	PARTNO		U305 ;
	NAME		U305 ;
	DATE		April 5, 1993 ;
	REV		6 ;
	DESIGNER	Dave Haynie ;
	COMPANY		Commodore ;
	ASSEMBLY	A3090 ;
	LOCATION	West Chester ;
	DEVICE		g22v10 ;

/************************************************************************/
/*									*/
/*	A3090	SCSI Master Interface					*/
/*									*/
/*	This device provides most of the Zorro III bus master interface */
/*	to the NCR 53C710.						*/
/*									*/
/************************************************************************/
/*									*/
/* DEVICE DATA:								*/
/*									*/
/*	Device:		22V10-10					*/
/*	Clock:		CLK (25MHz)					*/
/*	Unused:		9(I),10(I),14(I/O),15(I/),17(I/O)		*/
/*									*/
/************************************************************************/
/*									*/
/* REVISION HISTORY:							*/
/*									*/
/*	DBH Jul  9:	Original version.				*/
/*	DBH Oct 26:	Changes made to speed up Zorro III version of	*/
/*			the FCS signal.					*/
/*	DBH Nov  2:	Hold onto BFCS until AS goes away for slaves.	*/
/*	DBH Nov 17:	ASQ shutoff based on !AS to prevent FCS echo.	*/
/*	DBH Nov 19:	Eliminate A3 passthrough, part of the self-	*/
/*			reference fix.					*/
/*	DBH Apr  1:	Added the MASTER signal to prevent bogus A4091	*/
/*			activities when SCSI has the A4091 bus but not	*/
/*			the Zorro III bus.				*/
/*	DBH Apr  5:	When things lined up just right, we missed 	*/
/*			the start of the new AS* cycle.  Now it's	*/
/*			interlocked with the end of the FCS cycle.	*/
/*	COMPILE -M3							*/
/************************************************************************/

/** INPUTS: **/

PIN 1		=  CLK		;	/* 33MHz system clock. */
PIN 2		= !MYBUS	;	/* A3090 has the Zorro III bus. */
PIN 3		= !AS		;	/* SCSI address strobe. */
PIN 4		=  READ		;	/* The Zorro III read cycle. */
PIN 5		=  SIZ1		;	/* SCSI transfer size. */
PIN 6		=  SIZ0		;	
PIN 7		= !NOZ3		;	/* Zorro III bus cutoff */
PIN 8		= !MTCR		;	/* Zorro III multiple transfer strobe. */
PIN 10		=  MASTER	;	/* SCSI chip owns A4091 bus. */
PIN 11		=  A1		;	/* SCSI sizing addresses. */
PIN 13		=  A0		;
PIN 18		= !EFCS		;	/* Zorro III cycle strobe. */
PIN 23		=  DOE		;	/* Zorro III data ouput enable. */

/** OUTPUTS: **/

PIN 16		=  BFCS		;	/* Buffered cycle strobe. */
PIN 17		= !ASQ		;	/* Qualified version of the SCSI AS* */
PIN 19		= !DS0		;	/* Zorro III data strobes. */
PIN 20		= !DS1		;
PIN 21		= !DS2		;
PIN 22		= !DS3		;

/** BIDIRECTIONALS: **/


/** OUTPUT TERMS: **/

/* The buffered FCS depends on the mode.  In non-DMA modes, it's simply
   based on the expansion FCS, as long as a SCSI-chip cycle isn't present
   (that would indicate DMA awaiting a grant).  In DMA, the expansion 
   FCS starts a cycle, but it can go away before the A4091 SCSI chip cycle 
   is complete, so a latching term is added. */


/* With MASTER, I could interlock differently.  

BFCS		= EFCS & !MASTER & !MYBUS
		# EFCS &  MASTER &  MYBUS
		# BFCS & AS & ASQ & MYBUS
		# BFCS & AS & !MYBUS;*/

BFCS		= EFCS & !MYBUS & !AS
		# BFCS & !MYBUS &  AS
		# EFCS &  MYBUS &  AS
		# BFCS &  MYBUS &  AS & ASQ;

/* A Zorro III cycle is started based on the start of a SCSI cycle and the
   A3090's ownership of the Zorro III bus.  This is a qualifier for that
   start. */

ASQ.D		=  AS & !BFCS & !EFCS & MYBUS
		# ASQ & MYBUS;
ASQ.AR		= !AS;

/* The data strobes are based on the low order address and size input
   from the SCSI chip.  We don't turn these on until the A3090 is bus
   master and it's data time.  The conversions are standard '030
   style conversions. */

DS3		= READ
		# !A1 & !A0;

DS2		= READ
		# !A1 &               !SIZ0
		# !A1 &  A0 
		# !A1 &        SIZ1;

DS1		= READ
		# !A1 &       !SIZ1 & !SIZ0
		# !A1 &        SIZ1 &  SIZ0
		# !A1 &  A0 &         !SIZ0
		#  A1 & !A0;

DS0		= READ
		#        A0 &  SIZ1 &  SIZ0
		#             !SIZ1 & !SIZ0 
		#  A1 &  A0
		#  A1 &        SIZ1;

[DS3..0].OE	= MYBUS & DOE;

