	IFND	ppcsymbols_i
ppcsymbols_i	set	1

	include	"exec/types.i"

*
* Define all the standard PPC register mnemonics
*
gpr0	equrp	0
gpr1	equrp	1
gpr2	equrp	2
gpr3	equrp	3
gpr4	equrp	4
gpr5	equrp	5
gpr6	equrp	6
gpr7	equrp	7
gpr8	equrp	8
gpr9	equrp	9
gpr10	equrp	10
gpr11	equrp	11
gpr12	equrp	12
gpr13	equrp	13
gpr14	equrp	14
gpr15	equrp	15
gpr16	equrp	16
gpr17	equrp	17
gpr18	equrp	18
gpr19	equrp	19
gpr20	equrp	20
gpr21	equrp	21
gpr22	equrp	22
gpr23	equrp	23
gpr24	equrp	24
gpr25	equrp	25
gpr26	equrp	26
gpr27	equrp	27
gpr28	equrp	28
gpr29	equrp	29
gpr30	equrp	30
gpr31	equrp	31

r0	equrp	0
r1	equrp	1
r2	equrp	2
r3	equrp	3
r4	equrp	4
r5	equrp	5
r6	equrp	6
r7	equrp	7
r8	equrp	8
r9	equrp	9
r10	equrp	10
r11	equrp	11
r12	equrp	12
r13	equrp	13
r14	equrp	14
r15	equrp	15
r16	equrp	16
r17	equrp	17
r18	equrp	18
r19	equrp	19
r20	equrp	20
r21	equrp	21
r22	equrp	22
r23	equrp	23
r24	equrp	24
r25	equrp	25
r26	equrp	26
r27	equrp	27
r28	equrp	28
r29	equrp	29
r30	equrp	30
r31	equrp	31


fpr0	fequrp	0
fpr1	fequrp	1
fpr2	fequrp	2
fpr3	fequrp	3
fpr4	fequrp	4
fpr5	fequrp	5
fpr6	fequrp	6
fpr7	fequrp	7
fpr8	fequrp	8
fpr9	fequrp	9
fpr10	fequrp	10
fpr11	fequrp	11
fpr12	fequrp	12
fpr13	fequrp	13
fpr14	fequrp	14
fpr15	fequrp	15
fpr16	fequrp	16
fpr17	fequrp	17
fpr18	fequrp	18
fpr19	fequrp	19
fpr20	fequrp	20
fpr21	fequrp	21
fpr22	fequrp	22
fpr23	fequrp	23
fpr24	fequrp	24
fpr25	fequrp	25
fpr26	fequrp	26
fpr27	fequrp	27
fpr28	fequrp	28
fpr29	fequrp	29
fpr30	fequrp	30
fpr31	fequrp	31


f0	fequrp	0
f1	fequrp	1
f2	fequrp	2
f3	fequrp	3
f4	fequrp	4
f5	fequrp	5
f6	fequrp	6
f7	fequrp	7
f8	fequrp	8
f9	fequrp	9
f10	fequrp	10
f11	fequrp	11
f12	fequrp	12
f13	fequrp	13
f14	fequrp	14
f15	fequrp	15
f16	fequrp	16
f17	fequrp	17
f18	fequrp	18
f19	fequrp	19
f20	fequrp	20
f21	fequrp	21
f22	fequrp	22
f23	fequrp	23
f24	fequrp	24
f25	fequrp	25
f26	fequrp	26
f27	fequrp	27
f28	fequrp	28
f29	fequrp	29
f30	fequrp	30
f31	fequrp	31


*
* Define some standard PPC mappings
*
REG_ACU	equrp	0
REG_SP	equrp	1
REG_SSP	equrp	1
REG_TOC	equrp	2


*
* Define some standard Amiga 680xx<->PPC mappings
*
REG_D0	equrp	3
REG_D1	equrp	4
REG_D2	equrp	5
REG_D3	equrp	6
REG_D4	equrp	7
REG_D5	equrp	8
REG_D6	equrp	9
REG_D7	equrp	10

REG_A0	equrp	11
REG_A1	equrp	12
REG_A2	equrp	13
REG_A3	equrp	14
REG_A4	equrp	15
REG_A5	equrp	16
REG_A6	equrp	17
REG_A7	equrp	1

*
* Define unused PPC registers for orthogonality
* and avoid errors during the assembler programming
* by using mixed register mappings
*

REG_X0	equrp	18
REG_X1	equrp	19
REG_X2	equrp	20
REG_X3	equrp	21
REG_X4	equrp	22
REG_X5	equrp	23
REG_X6	equrp	24
REG_X7	equrp	25
REG_X8	equrp	26
REG_X9	equrp	27
REG_X10	equrp	28
REG_X11	equrp	29
REG_X12	equrp	30
REG_X13	equrp	31


PPC601_Version	=	1
PPC603_Version	=	3
PPC603e_Version	=	6


;MSRF_SF	=(63-0)		; 63 64Bit Mode!!!!

MSRF_VEC	=$02000000	; 6 VMX Vector engine

MSRF_POW	=$40000		; 13 Power Management
MSRF_TGPR	=$20000		; 14 Temporary GPR remapping(603e)
MSRF_ILE	=$10000		; 15 Exception Little Endian Mode
MSRF_EE		=$8000		; 16 External Interrupt Enable
MSRF_PR		=$4000		; 17 Priviledge Level
MSRF_FP		=$2000		; 18 Floating Point available
MSRF_ME		=$1000		; 19 Machine Check enable
MSRF_FE0	=$800		; 20 Floating Point Exception Mode 0
MSRF_SE		=$400		; 21 Single Step enable
MSRF_BE		=$200		; 22 Branch Trace enable
MSRF_FE1	=$100		; 23 Floating Point Exception Mode 1
MSRF_RESERVED3	=$80		; 24 Reserved
MSRF_IP		=$40		; 25 Exception Prefix
MSRF_IR		=$20		; 26 Instruction address translation
MSRF_DR		=$10		; 27 Data address translation
MSRF_RESERVED2	=$8
MSRF_604_PM	=$4		; 29 Performance Monitor marked mode
MSRF_RI		=$2		; 30 Recoverable exception
MSRF_LE		=$1		; 31 Little endian mode


HID0_603_F_EMCP		=$80000000	;0 Enable Machine Check pin
HID0_603_F_RESERVED1	=$40000000	;1 Reserved
HID0_603_F_EBA		=$20000000	;2 Enable Bus address parity checking
HID0_603_F_EBD		=$10000000	;3 Enable Bus data parity checking
HID0_603_F_SBCLK	=$8000000	;4 Select Bus clock for test clock pin
HID0_603_F_EICE		=$4000000	;5 Enable ICE outputs-pipeling tracking support
HID0_603_F_ECLK		=$2000000	;6 Enable external test clock pin
HID0_603_F_PAR		=$1000000	;7 Disable precharge of ARTRY and shared signals
HID0_603_F_DOZE		=$800000	;8 Doze Mode-PLL=time base and snooping alive
HID0_603_F_NAP		=$400000	;9 Nap Mode-PLL=time base active
HID0_603_F_SLEEP	=$200000	;10 Sleep Mode-no external clock required
HID0_603_F_DPM		=$100000	;11 Enable dynamic Power Management
HID0_603_F_RISEG	=$80000		;12 Reserved for Test
HID0_603_F_RESERVED10	=$40000		;13
HID0_603_F_RESERVED9	=$20000		;14
HID0_603_F_NHR		=$10000		;15 Not Hard Reset
HID0_603_F_ICE		=$8000		;16 Enable Instruction Cache
HID0_603_F_DCE		=$4000		;17 Enable Data Cache
HID0_603_F_ILOCK	=$2000		;18 Instruction Cache Lock
HID0_603_F_DLOCK	=$1000		;19 Data Cache Lock
HID0_603_F_ICFI		=$800		;20 Instruction Cache flush invalidate
HID0_603_F_DCFI		=$400		;21 Data Cache flush invalidate
HID0_603_F_RESERVED22	=$200		;22
HID0_603_F_RESERVED23	=$100		;23
HID0_603_F_RESERVED24	=$80		;24
HID0_603_F_RESERVED25	=$40		;25
HID0_603_F_RESERVED26	=$20		;26
HID0_603_F_FBIOB	=$10		;27 Force Branch indirect on bus
HID0_603_F_RESERVED28	=$8		;28
HID0_603_F_RESERVED29	=$4		;29
HID0_603_F_RESERVED30	=$2		;30
HID0_603_F_NOOPTI	=$1		;31 No-op touch instructions


HID0_604_F_EMCP		=$80000000	;0 Enable Machine Check pin
HID0_604_F_ECPC		=$40000000	;1 Enable Cache Parity Checking(604e)
HID0_604_F_EBA		=$20000000	;2 Enable Bus address parity checking
HID0_604_F_EBD		=$10000000	;3 Enable Bus data parity checking
HID0_604_F_RESERVED4	=$8000000	;4 Reserved
HID0_604_F_RESERVED5	=$4000000	;5 Reserved
HID0_604_F_RESERVED6	=$2000000	;6 Reserved
HID0_604_F_DSS		=$1000000	;7 Disable Snoop response high state restore
HID0_604_F_RESERBED8	=$800000	;8 Reserved
HID0_604_F_RESERBED9	=$400000	;9  Reserved
HID0_604_F_RESERBED10	=$200000	;10 Reserved
HID0_604_F_RESERBED11	=$100000	;11 Reserved
HID0_604_F_RESERBED12	=$80000		;12 Reserved
HID0_604_F_RESERVED13	=$40000		;13 Reserved
HID0_604_F_RESERVED14	=$20000		;14 Reserved
HID0_604_F_NHR		=$10000		;15 Not Hard Reset
HID0_604_F_ICE		=$8000		;16 Enable Instruction Cache
HID0_604_F_DCE		=$4000		;17 Enable Data Cache
HID0_604_F_ILOCK	=$2000		;18 Instruction Cache Lock
HID0_604_F_DLOCK	=$1000		;19 Data Cache Lock
HID0_604_F_ICFI		=$800		;20 Instruction Cache flush invalidate
HID0_604_F_DCFI		=$400		;21 Data Cache flush invalidate
HID0_604_F_RESERVED22	=$200		;22 Reserved
HID0_604E_F_CIFE	=$100		;23 Coherent Instruction fetch enable(604e only)
HID0_604_F_DSIE		=$80		;24 Serial Instruction execution disable
HID0_604_F_RESERVED25	=$40		;25
HID0_604_F_RESERVED26	=$20		;26
HID0_604_F_FBIOB	=$10		;27 Force Branch indirect on bus
HID0_604_F_RESERVED28	=$8		;28
HID0_604_F_EBHT		=$4		;29 Branch History Table enable
HID0_604_F_RESERVED30	=$2		;30
HID0_604E_F_BTAC	=$2		;30 64bit entry branch target cache disable(with rev 1.1 Mach5 this doesn`t work..DISABLE)
HID0_604_F_RESERVED31	=$1		;31 Reserved


	ENDC
