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80296SA

MCS® 96 Microcontroller Overview

Intel's MCS® 96 microcontroller product family is the industry standard for 16-bit embedded microcontrollers. The 8XC196 products are found in a variety of embedded applications. The high-performance register to register architecture is well suited for complex real-time control applications such as hard disk drives, modems, printers, pattern recognition and motor control. Our broad portfolio of 8XC196 microcontroller products has been designed to meet your varying peripheral, memory size, addressability and performance requirements.

The 8XC196 family shares a common core architecture which is register based. The MCS 96 microcontroller register architecture eliminates the accumulator bottleneck and enables fast context switching. All devices have bit, byte, word and some 32-bit operations. The table below summarizes the capture and generation of high speed signals on the HSIO and EPA.

OPERATION 16 MHz 20 MHz 24 MHz 50 MHz
HSI (High speed input) 1.125 us 900 ns    
HSO (High speed output) 1 us 800 ns    
EPA (Event processor array) 200 ns 200 ns 167 ns 80 ns

The 8XC196 Bus Controller features programmable wait state generation. 8- or 16-bit bus width and features a HOLD/HLDA protocol for multiprocessor systems. The 8XC196NP/NU have dynamically selectable multiplexed/demultiplexed bus and a chip select unit.

The MCS 96 microcontroller product family has three distinct product lines. The most recent products form the EPA family. This family of devices has the advanced peripherals which include a flexible input/output system and EPA (Event Processor Array). The HSIO family consists of devices that have the High Speed Input/Output sub-system. The Motion Control family is comprised of devices that support motor control applications. This family also uses the EPA system for I/O control.

The 8XC196 Bus Controller features programmable wait state generation. 8- or 16-bit bus width and features a HOLD/HLDA protocol for multiprocessor systems. The 8XC196NP/NU have dynamically selectable multiplexed/demultiplexed bus and a chip select unit.

The MCS 96 microcontroller product family has three distinct product lines. The most recent products form the EPA Family. This family of devices has the advanced peripherals which include a flexible input/output system and EPA (Event Processor Array). The HSIO Family consists of devices that have the High Speed Input/Output sub-system. The Motor Control Family is comprised of devices that support motor control applications. This family also uses t he EPA system for I/O control.

FEATURES BENEFITS
16-bit CPU High Performance. Up to 50 MHz.
On-chip memory Low cost. Cost-effective solution
Register-to-register architecture Efficient. More compact code than accumulator-based architecture, which allows more efficient use of memory
Unlimited usage. Minimum of 232 registers can be directly addressed at any time
Three operand instructions Create efficient code. Preserve the source data
Bus controller features programmable wait-state generation and 8- or 16-bit bus widths Econmoical. Efficient usage of wide variety of memory and peripheral devices
Flat addressability of large register files Fewer barriers. Avoids artificial limitation of barriers of segmented files
Three distinct product lines:
- Event Processor Array
- High Speed Input/Output
- Motion Control
Advanced. Peripherals include configurable input/output ports and modular event processor array structure
Speed. Devices with high-speed input FIFO and output system
Waveform. Uses waveform generator and event processor array system for input/output

MCS®296 Microcontroller Overview

Intel's MCS® 296 microcontroller is the latest addition to the Intel MCS®96 microcontroller family. The 80296SA is performance enhanced from the 8XC196NP and 8XC196NU controllers while maintaining binary code compatibility. Hence, the 80296SA can be dropped into a 8XC196NP/NU socket and immediately boost system performance.

The 80296SA exhibits improved math performance over previous architectures making it suitable for embedded digital signal processing and feedback control systems. The 80296SA can perform 12.5 DSP MIPS and 16 general purpose MIPS. The 80296SA has 512 bytes of register RAM and 2 Kbytes of code/data RAM. The 80296SA utilizes the same peripherals as the 8XC196NP/NU. Additionally, like the 8XC196NU, the 80296SA includes a phase-lock loop. With the phase lock loop, an external clock drives the device at one half or one quarter the maximum internal clock frequency. Therefore, the system is designed for lower frequency external clock or oscillators while maintaining the maximum internal operating frequency. Enhancements to the chip select unit, the interrupts, and the timers were also implemented. The windowing scheme was enhanced to include the windowing of some external memory locations for direct addressing.

The 80296SA is available in 100L QFP which is pin compatible with the 8XC196NU/NP for ease of upgradability. For existing 8XC196NU/NP users, the 80296SA provides an easy performance upgrade which translates to faster time to market. For customers who are looking for 16 bit microcontroller with an extra boost to performance, the 80296SA provides the performance edge required at an affordable price.

FEATURES BENEFITS
50 Mhz Operation Higher Performance
Binary-code compatible with Intel's 8xC196NU/NP microcontrollers Protect existing software investment
Pipelined architecture/reduced execution states Up to 5 times faster than the 8xC196KC20
6 Mbyte of address space More memory headroom for high level language compilation
2 Kbytes code/data RAM High speed code memory, more space to store data
40-bit accumulator Added signal processing capability
Multiply and accumulate executes in 80 ns using 40-bit hardware accumulator Useful in signal processing and feedback control system
512 bytes register RAM Fast data manipulation within register space

Development Tools

MCS® 96
The MCS® 96 microcontroller product family is supported by a variety of development tools, including and evaluation boards. ApBUILDER, Intel's interactive programming software, is a powerful tool that generates peripheral initialization code in ASM and C for Intel's embedded devices with a click of a mouse. This free software tool, along with Hypertext User's Manuals, speeds up the learning curve and can reduce design time.

Project Builder Kits are low-cost development platforms that give design engineers all the hardware and software tools needed to fully evaluate device features and performance. These turnkey kits provide tools for every stage of the project design cycle. The MCS 96 microcontroller version can be ordered through your Intel sales representative using order # PROJBLD196KBCD.

MCS® 296
The MCS® 296 controller is complemented by a complete set of hardware and software tools from Intel and leading third party development tool vendors. Software development is supported by ANSI C compiler, assembler, linker/locator, debugger, and simulators from Tasking, IAR, and ChipTools. Hardware design and debug is supported by In Circuit Emulators from Nohau and Kontron.

Product evaluation is facilitated using Intel's 296SA Eval Kit. This kit includes a board, debug monitor, APBuilder and evaluation copies of third party software development tools to facilitate code development and execution.

MCS® 96 Microcontroller Linecard

DEVICE ROM/ OTPROM Register RAM Code RAM Timer/ Counters Analog Input Channels I/O Pins I/O Type Serial Ports Speed (MHz) Process Package ONCE Test Mode Address Space Temp. Key Features
HSIO Family
8XC196KB/
8XC196KB16		 8K 232 NO 2 8 48 HSIO 1 12, 16 CMOS N-68, S-80 YES 64K C, E, A, M Low-Power, High Performance CMOS
8XC19816 8K 232 NO 2 4 48 HSIO 1 16 CMOS N-52, S-80 YES 64K C, E, A, M Lower-Cost, 8-bit Bus, 4 Channel Version of KB
8XC196KC20 16K 488 NO 2 8 48 HSIO 1 16, 20 CMOS N-68, SB-80 YES 64K C, E, A, M 16K OTPROM, 488 Byte RAM 3-PWM, PTS
8XC196KD/
8XC196KD20		 32K 1000 NO 2 8 48 HSIO 1 16, 20 CMOS N-68, SB-80 YES 64K C, E, A, M 32K OTPROM, 1000-byte RAM Version of KC
Motion Control Family
8XC196MC 16K 488 NO 2 13 53 8 EPA PTS
Mode		 16 CMOS N-84, S, U YES 64K A PTS, PWM, 3-Phase Waveform Generator
8XC196MD 16K 488 NO 2 14 64 12 EPA PTS
Mode		 16 CMOS N-84, S, U YES 64K A MC Enhancement with Frequency Generator
8XC196MH 32K 744 NO 2 8 52 6 EPA 2 16 CMOS N-84, S, U YES 64K A Enhanced 3-Phase Waveform
Generator w/ 32K EPROM
EPA Family
8XC196KQ 12K 360 128 2 8 56 10 EPA 2 16 CMOS N-68 YES 64K A 10 EPA, 8 A/D, 56 I/O lines, 12K OTPROM
8XC196KR 16K 488 256 2 8 56 10 EPA 2 16 CMOS N-68 YES 64K C, E, A Memory scaler version of KQ
8XC196KS 24K 1000 256 2 8 56 10 EPA 2 16 CMOS N-68 YES 64K A Memory scalar version of KR with enhanced bus controller
8XC196KT 32K 1000 512 2 8 56 10 EPA 2 16 CMOS N-68 YES 64K A Memory scalar version of KS with enhanced bus controller
8XC196JQ 12K 360 128 2 6 41 6 EPA 2 16 CMOS N-52 YES 64K A 6 EPA, 6 A/D, 52ld package for cost sensitive applications
8XC196JR 16K 488 256 2 6 41 6 EPA 2 16 CMOS N-52 YES 64K A 6 EPA, 6 A/D, 52ld package, more memory than JQ
8XC196JT 32K 1000 512 2 6 41 6 EPA 2 16 CMOS N-52 YES 64K A 6 EPA, 6 A/D, 52ld package, more memory than JS
8XC196CA 32K 1000 256 2 6 44 6 EPA 2 20 CMOS N-68 YES 64K A Integrated CAN 2.0 controller
8XC196CB 56K 1.5K 512 2 8 56 10 EPA 2 20 CMOS N-84 YES 1M A Integrated CAN 2.0, 1MB linear address range, 2K total RAM
83C196EA 8K 1000 3000 4 16 76 17
EPA		 3 32 CMOS S-160 YES 2M A Serial Debug Unit, 4K total RAM, 2MB linear address range, 8 output simul capture, 3 chip selects
8XC196NP 4K 1000 NO 2 0 32 4 EPA 1 25 CMOS S-100,
SB-100		 YES 1M A 1Mbyte Linear Address Range, Low Power, 6 Chip Selects, 3 PWMs, Demux bus
8XC196NT 32K 1000 512 2 4 56 10 EPA 2 20 CMOS N-68 YES 1M C 1M Byte Linear Address Range
80C196NU NO 1000 NO 2 0 32 4 EPA 1 40,50 CMOS S-100, SB-100 YES 1M C 1M Byte Linear Address Range,
6 Chip Selects, 3 PWMs, Demux bus

MCS® 296 Microcontroller Linecard

DEVICE ROM/ OTPROM Register RAM Code RAM Timer/ Counters Analog Input Channels I/O Pins I/O Type Serial Ports Speed (MHz) Process Package ONCE Test Mode Address Space Temp. Key Features
80296SA NO 512 2000 2 NO 32 TTL 1 40,50 P650 S,SB-100 YES 6M C 4 Stage Pipe Line
Able to Execute 1 Instruction in 40ns at 50MHz
Integrated DSP Capability
6MB Address Space

Packages:
C = 48L Cermaic DIP
N = 68L PLCC
N-52 = 52L PLCC
N-68 = 68L PLCC
N-84 = 84L PLCC
P = 68L Plastic DIP
R = 68L Ceramic LCC
S = 80L QFP (EIAJ)
S100 = 100L QFP
SB100 = 100L SQFP
U = 64L Shrink DIP

Temperature Ranges: