From: lae@mullauna.cs.mu.OZ.AU (Lewin Aleksis EDWARDS) Newsgroups: comp.sys.amiga.hardware,comp.sys.amiga.tech Subject: READ : 1Mb Agnus Installation (A500) Message-ID: Date: 14 Oct 91 22:50:36 GMT Sender: news@cs.mu.OZ.AU Organization: Computer Science, University of Melbourne, Australia Lines: 146 ---=== 1MB CHIP-RAM HACK TYPED FOR POSITIVELY THE LAST TIME ===--- -= Lewin A.R.W. Edwards InterNet:lae@mullauna.cs.mu.OZ.AU =- -= What is the 1Mb Agnus ? =- The 1Mb Agnus (variously known as the Obese Agnus or Fatter Agnus), C= part #8372a or 318069-02, is the relatively new Agnus which is capable of addressing 1Mb of chip-RAM. This allows you to have twice the amount of sampled music, screens, and other custom-chip data in memory simultaneously. It also has the desirable effect of letting you run things like Deluxe Paint in 16-color 640x512 (or 640x400, NTSC users) mode, without having to disconnect external drives, close down WorkBench screens and the like. For A-Max users, installing the new Agnus and configuring it to 1Mb chip-RAM mode will also increase A-Max compatibility. If you have more than 1Mb of RAM, then it will make A-Max virtually 100% identical to a Mac Plus, memory-map-wise. NOTE WELL : This modification requires 1Mb of RAM to be visible ! C=, not wishing to make two chips where one will do, is now shipping the 8372a in most (nearly all Rev. 6a) A500's, without telling anybody. In these machines, the extra chip-RAM capability has been disabled so that if you connect an A501, it will still think it is "slow" [see below] RAM. -= An Aside on Memory Speeds =- The Amiga has *three* types of RAM. Chip-RAM, Fast-RAM and "Slow"-RAM. Contrary to what many people assert, RAM at $C00000 (the default location of the A501 expander, and the second 512K of RAM in A2000's) is NOT fast-RAM, even though the system reports it as such. Because this RAM is refreshed and accessed via Agnus, it is affected by buss contention in just the same way as chip-RAM. It is simply a dead area in RAM which is not accessed by the custom chips and which is not faster than chip-RAM. Moving this RAM to $80000 (which is what you do to enable 1Mb chip-RAM) will have no effect on machine speed at all. Trust me ;) -= Compatibility =- To date (14-Oct-91, 19:46EST) I have personally tested at least 400 pieces of software with the new Agnus. I have found three programs which do not work : * Double Dragon II (Completely screwed up) * VideoFX 3D (Again, completely useless) * Impossible Mission II (This game requires memory at $C00000. It does not mind the Agnus, but if you want to run it you must drop back to 512K chip/512K slow mode. Lousy AllocAbs() programmer !) In addition, Dragon Ninja thinks you are running on a 512K machine and will not play in-game music. Again, this can be rectified by switching into 512K chip/512K slow mode. -= Identifying the Version of your A500 =- There are several versions of the A500 out there. I have only tried fitting the new Agnus to the following : a. The Revision 5 board shipped until early 1989 b. The new Revision 6a board supplied from May (?) 1989 onwards The way to identify your machine type is to check the expansion port which lurks under a plastic cover on the left-hand side of the computer. The Rev. 5 machine has a very fat strip (double width) at the back of the connector; the Rev. 6a board has two normal-width strips instead. -= Installing the 8372a to Revision 5 A500's =- 1. Remove the 8371 from its socket. If you are an NTSC user who does not wish to use the PAL mode, go to step 3. 2. Pin 41 of the new Agnus controls whether the machine starts up in PAL or NTSC modes. When it is tied low (to ground), the machine boots in NTSC mode. When the line is tied high or left floating (ie unconnected), it boots into PAL mode. On the Rev. 5 board, pin 41 is connected to ground by tracks on BOTH sides of the board, making it virtually impossible to cut the track without desoldering the socket. This means if you just plug in the new Agnus, you will be locked in NTSC mode !! There are a couple of ways to go about circumventing this problem; I will detail here the one I undertook on my own Rev. 5 board. I will assume you want to install some sort of switch to toggle PAL/NTSC mode. If you only want to run in PAL mode, you can simply bend out pin 41 of the Agnus socket (don't bend the pin on the chip) to prevent it from making contact with Agnus. If you do this, proceed to step 3. Otherwise, get yourself an SPDT or SPST toggle switch and two lengths of telephone (or other thin, stiff single-core wire). Solder wires to the switch : +---+ To a convenient ground--+-o | BACK VIEW OF SWITCH +--------+-o | When held as shown, UP=PAL, DOWN=NTSC. | | o | | +---+ Uninsulated --> | | <-- This side is insulated \-/ <-- Fold the wire thru 180 degrees 3. Insert the new Agnus. If installing the switch, you should now poke the loose end of wire (see above) from the switch into pin 41 of the socket so that the bare copper side touches the pin on the chip and the insulated side touches the pin on the socket. 4. If you wish to install a memory mode switch, go to step 5. Otherwise, locate JP2 (between 68000 and ROM). This consists of three pads. The center and lower pads are joined by a thin track. Cut this track and place a drop of solder between the center and upper pads. Now locate the _EXRAM line coming from the A501 port (it comes from pin #32 and runs on the upper side of the motherboard parallel to the A501 connector). Cut this line. You have now finished installation. 5. Complicated. Locate JP2 and cut the track which joins the center and lower pads. Locate the _EXRAM line from the A501 port (see step 4) and cut the track. Solder wires to all three pads of JP2 and one wire to either side of the gap you cut in the _EXRAM track. Wire a DPDT switch as follows : +-----+ BACK VIEW OF SWITCH Upper pad of JP2 --+-o o | When held as shown, UP=512K CHIP, DOWN=1M CHIP Center pad of JP2 -+-o o-+- To one side of the gap in the _EXRAM track Lower pad of JP2 --+-o o-+- To the other side of the gap +-----+ You have now completed installation. -= Installing the 8372a to Revision 6a A500's =- 1. Remove the 8371 from its socket. Insert the new 8372a. NTSC users who do not wish to use the PAL mode should go to step 3. 2. JP4 controls PAL/NTSC video mode. If you are in North America or Hong Kong or anywhere else the National Television Standards Committee TV format is used, this should be bridged by a track or a blob of solder. If you are in Australia, Europe or anywhere else the Phase-Alternated Linescan TV format is used, this jumper should be cut open. If you wish to install a switch, then simply connect it across the two pads of the jumper. 3. Cut the track joining the center and upper pads of JP2, and the track joining the center and upper pads of JP7a. (JP2 is between the CPU and the ROM and JP7a is just to the left of the A501 connector). If you wish to install a memory switch, proceed to step 4 otherwise solder the center and lower pads of JP2 together. You have now completed the installation procedure. 4. Connect a DPDT switch as follows : +-----+ BACK VIEW OF SWITCH Upper pad of JP2 --+-o o | When held as shown, UP=512K CHIP, DOWN=1M CHIP Center pad of JP2 -+-o o-+-- Center pad of JP7a Lower pad of JP2 --+-o o-+-- Upper pad of JP7a +-----+ -= A500 Jumper Assignments =- Number Rev5 ? Rev6 ? Function ------------------------------------------------------------------------------- JP1 yes yes Connects reset timer (NE555) to main reset JP2 yes yes Maps A501 at $C00000 or $80000 JP3 yes yes Swaps _CAS of RAM banks JP4 no yes 8371 Agnus : _TEST line [solder closed !!] 8372a Agnus : PAL/NTSC video mode select JP5 no yes 28MHz base clock to Agnus JP6 no yes 7MHz clock on pin 7 of expansion connector JP7a no yes Controls _EXRAM to Gary JP7b no yes CIA tick from VSYNC or pin 32 of A501 (default VSYNC) JP8 no yes LPEN from FIRE0 or FIRE1 JP9 no no ??? A non-existent jumper. Future Rev. 7 ?? JP10a no yes Connects AUDIN to pin 18 of serial port JP10b no yes Connects AUDOUT to pin 11 of RS232 port JP11 no yes Connects CSYNC to BCSYNC or video hybrid ------------------------------------------------------------------------------- End of article 18242 (of 18242)--what next? [npq]