#define FlagsNZ(z)\
	flags &=~(ZER+NEG); if (z==0) flags|=ZER; else flags |=z&128

#define ORA(x) a|=ByteAt(x()); FlagsNZ(a)
#define ASL(x) \
	register word addr;\
	register byte tbyte;\
	addr = x();\
	tbyte = ByteAt(addr);\
	flags &=~(CAR+NEG+ZER);\
	if (tbyte&128) flags |= CAR;\
	if (tbyte=tbyte<<1) flags |=tbyte&128; else flags |=ZER;\
	RAM[addr] = tbyte
#define LSR(x) \
	register word addr;\
	register byte tbyte;\
	addr=x();\
	tbyte=ByteAt(addr);\
	flags &=~(CAR+NEG+ZER);\
	flags |=tbyte&1;\
	if (tbyte=tbyte>>1); else flags |=ZER;\
	RAM[addr]=tbyte
#define BCL(x) \
	register byte tbyte;\
	if (flags&x) pc++; \
	else {\
		tbyte=ImmediateByte();\
		pc++;\
		if (tbyte&128) {\
			pc-=(tbyte^255)+1;\
			return; }\
		pc +=tbyte; }
#define BST(x) \
	register byte tbyte;\
	if (flags&x) {\
		tbyte=ImmediateByte();\
		pc++;\
		if (tbyte&128) {\
			pc-=(tbyte^255)+1;\
			return; }\
		pc +=tbyte; }\
	else pc++;
#define CLR(x) flags &=~x; return
#define SET(x) flags |= x; return
#define AND(x) a &= ByteAt(x()); FlagsNZ(a)
#define BIT(x) \
	register byte tbyte;\
	tbyte=ByteAt(x());\
	flags &=~(ZER+NEG+OVF);\
	if ((a&tbyte)==0) flags |=ZER;\
	flags |=tbyte&(128+64)
#define ROL(x) \
	register word addr;\
	register byte tbyte;\
	addr=x();\
	tbyte=ByteAt(addr);\
	if (flags&CAR) {\
		if (tbyte&128);\
		else flags &=~CAR;\
		tbyte=(tbyte<<1)|1; }\
	else {\
		if (tbyte&128) flags|=CAR;\
		tbyte=tbyte<<1; }\
	FlagsNZ(tbyte);\
	RAM[addr]=tbyte
#define EOR(x) 	a^=ByteAt(x());FlagsNZ(a)
#define ADC(x) \
	register word data;\
	data=ByteAt(x());\
	if (flags&DEC) {\
		data = bcd2dec[data]+bcd2dec[a]+((flags&CAR)?1:0);\
		flags &= ~(CAR+OVF+NEG+ZER);\
		if (data>99) {flags|=CAR+OVF;data -=100;}\
		if (data==0) flags|=ZER; else flags |=data&128;\
		a=dec2bcd[data];}\
	else {\
		data += a+((flags&CAR)?1:0);\
		flags &= ~(CAR+OVF+NEG+ZER);\
		if (data>255) {flags|=OVF+CAR; data &=255;}\
		if (data==0) flags|=ZER; else flags |=data&128;\
		a=data;}
#define ROR(x) \
	register word addr;\
	register byte tbyte;\
	addr=x(); tbyte=ByteAt(addr);\
	if(flags&CAR){if(tbyte&1); else flags&=~CAR;tbyte=(tbyte>>1)|128;}\
	else{if(tbyte&1) flags|=CAR;tbyte=tbyte>>1;}\
	FlagsNZ(tbyte); RAM[addr]=tbyte
#define STA(x) RAM[x()]=a
#define STY(x) RAM[x()]=y
#define STX(y) RAM[y()]=x
#define CPY(x) \
	register byte tbyte;\
	tbyte=ByteAt(x()); flags &=~(CAR+ZER+NEG);\
	if (y==tbyte) flags |=CAR+ZER;\
	else if (y>tbyte) flags |=CAR;\
		else flags |=NEG
#define CPX(y) \
	register byte tbyte;\
	tbyte=ByteAt(y()); flags &=~(CAR+ZER+NEG);\
	if (x==tbyte) flags |=CAR+ZER;\
	else if (x>tbyte) flags |=CAR;\
		else flags |=NEG
#define CMP(x) \
	register byte tbyte;\
	tbyte=ByteAt(x()); flags &=~(CAR+ZER+NEG);\
	if (a==tbyte) flags |=CAR+ZER;\
	else if (a>tbyte) flags |=CAR;\
		else flags |=NEG
#define SBC(x) \
	register int data;\
	data=ByteAt(x());\
	if (flags&DEC) {\
		data = bcd2dec[a]-bcd2dec[data]-((flags&CAR)?0:1);\
		flags &= ~(CAR+ZER+NEG+OVF);\
		if (data==0) flags |=ZER+CAR;\
		else if (data>0) flags |=CAR;\
			else {flags|=NEG; data +=100;}\
		a=dec2bcd[data];}\
	else {\
		data = a-data-((flags&CAR)?0:1);\
		flags &=~(CAR+ZER+OVF+NEG);\
		if (data==0) flags |=ZER+CAR;\
		else if (data>0) flags |=CAR;\
			else flags|=OVF;\
		flags |=data&128;\
		a=data&255;}
#define DECR(x) \
	register word addr; register byte tbyte;\
	addr=x(); tbyte=ByteAt(addr);\
	flags &=~(ZER+NEG);\
	if (--tbyte) flags |=tbyte&128; else flags|=ZER;\
	RAM[addr]=tbyte
#define INCR(x) \
	register word addr; register byte tbyte;\
	addr=x(); tbyte=ByteAt(addr);\
	flags &=~(ZER+NEG);\
	if (++tbyte) flags |=tbyte&128; else flags|=ZER;\
	RAM[addr]=tbyte
#define LDA(x) a=ByteAt(x()); FlagsNZ(a)
#define LDY(x) y=ByteAt(x()); FlagsNZ(y)
#define LDX(y) x=ByteAt(y()); FlagsNZ(x)