;nop
@@_00:
  inc si
  nextop 4,1

;ccf
@@_3f:
  inc si
  xor ah,1
  and ah,0fdh
  nextop 4,1

;cpl 1 4
@@_2f:
  inc si
  not al
  or ah,12h
  nextop 4,1

;daa 1 4
; problemer unntatt rett etter adc/add/sub/sbc
; virker ikke etter 16-bits add - burde ikke bety noe
@@_27:
  inc si
  test ah,2
  jnz @@_27_1
  sahf
  daa
  jmp @@_27_2
@@_27_1:
  sahf
  das
@@_27_2:
  lahf
  nextop 4,1

;di 1 4
@@_f3:
  inc si
  mov [reg_iff],0 ;clear iff1 and iff2
  nextop 4,1

;ei 1 4
@@_fb:
  inc si
  mov [reg_iff],65535 ; set iff1 and iff2
  nextop 4,1

;djnz
; b#0 3 13
; b=0 2 8
@@_10:
  inc si
  dec r_b
  jz @@_10_1
  movsx di,[byte ptr si]
  inc si
  add si,di
  dojump 13
@@_10_1:
  inc si
  nextop 8,0

;ex af,af' 1 4
@@_08:
  inc si
  xchg al,ah
  xchg ax,r_aaf
  xchg al,ah
  nextop 4,1

;ex de,hl 1 4
@@_eb:
  inc si
  xchg r_hl,r_de
  nextop 4,1

;ex de,ix 2 8
@@_dd_eb:
  inc si
  inc si
  xchg r_de,r_ix
  nextop 8,0

;ex de,iy 2 8
@@_fd_eb:
  inc si
  inc si
  xchg r_de,r_iy
  nextop 8,0

;ex (sp),hl 5 19
@@_e3:
  inc si
  xchg bx,[ds:bp]
  tw bp,19
  nextop 0,1

;ex (sp),ix 6 23
@@_dd_e3:
  inc si
  inc si
  mov di,r_ix
  xchg di,[ds:bp]
  mov r_ix,di
  tw bp,23
  nextop 0,0

;ex (sp),iy 6 23
@@_fd_e3:
  inc si
  inc si
  mov di,r_iy
  xchg di,[ds:bp]
  mov r_iy,di
  tw bp,23
  nextop 0,0

;exx 1 4
@@_d9:
  inc si
  xchg r_bc,r_abc
  xchg r_de,r_ade
  xchg r_hl,r_ahl
  nextop 4,1

;halt 1 4 +++
@@_76:
  inc si
ifdef exact
  and [cycles],3
  add [cycles],39996
  mov [cyc_2],0
else
@@_76_1:
  test [byte ptr need_int],255
  jz @@_76_1
endif
  dojump 4

;im 0 2 8
; one instruction fetched from bus on int
@@_ed_46:
  add si,2
  mov [reg_im],0
  nextop 8,0


;im 1 2 8
; rst 38h executed on int
@@_ed_56:
  add si,2
  mov [reg_im],1
  nextop 8,0

;im 2 2
; jp (256*I+byte on bus) on int
@@_ed_5e:
  add si,2
  mov [reg_im],2
  nextop 8,0

;in r,(C) 3 12
; read from port BC
; set flags according to result
macro inreg reg
  and ax,025ffh
  push ax
  call input
  mov reg,al
  or reg,reg
  lahf
  and ax,0dc00h
  pop di
  or ax,di
  inc si
  inc si
  nextop 12,0
endm

@@_ed_40: inreg r_b
@@_ed_48: inreg r_c
@@_ed_50: inreg r_d
@@_ed_58: inreg r_e
@@_ed_60: inreg r_h
@@_ed_68: inreg r_l
@@_ed_70 equ illop
@@_ed_78:
  and ax,2500h
  push ax
  call input
  or al,al
  lahf
  and ax,0dcffh
  pop di
  or ax,di
  inc si
  inc si
  nextop 12,0

purge inreg

;in a,(n) 3 11
; read from port AN, n is a constant
; don't touch the flags
@@_db:
  push cx
  push ax
  mov ch,al
  inc si
  mov cl,[ds:si]
  inc si
  call input
  pop cx
  mov ah,ch
  pop cx
  nextop 11,0

;ind 4 16
; (hl):=port (c) ; b:=b-1 ; hl:=hl-1
@@_ed_aa equ illop

;indr 4 16 + n* 5 21
; ind until b=0
@@_ed_ba equ illop

;ini 4 16
; (hl):=port (c) ; b:=b-1 ; hl:=hl+1
@@_ed_a2 equ illop

;inir 4 16 + n* 5 21
; ini until b=0
@@_ed_b2 equ illop

;otdr  (4 16)+b*(5 21)
; port(c):=(hl) ; b:=b-1 ; hl:=hl-1
; if b>0, repeat
; flags: Z:=1, N:=1, S,H,P/V:=?
@@_ed_bb equ illop

;otir
@@_ed_b3 equ illop

;out (c),r  3 12
; port (bc):=r
; flags aren't touched
macro outbc reg8
  push ax
  mov al,reg8
  call output
  pop ax
  inc si
  inc si
  nextop 12,0
endm

@@_ed_41: outbc r_b
@@_ed_49: outbc r_c
@@_ed_51: outbc r_d
@@_ed_59: outbc r_e
@@_ed_61: outbc r_h
@@_ed_69: outbc r_l
@@_ed_71: outbc 0
@@_ed_79: outbc r_a

purge outbc

;out (n),a  3 11
; port (an):=a
; (methinks that port address is an)
@@_d3:
  push cx
  mov ch,al
  inc si
  mov cl,[ds:si]
  call output
  pop cx
  inc si
  nextop 11,0

;outd  4 16
; port(c):=(hl) ; b:=b-1 ; hl:=hl-1
; z:=0 if b=0, n:=1, s,h,p/v:=?         BUG
@@_ed_ab:
  dec r_hl              ;bug: no actual output
  dec r_b
  inc si                ;bug: no flag handling
  inc si
  nextop 16,0

;outi  4 16
; port(bc):=(hl) ; b:=b-1 ; hl:=hl+1
; z:=0 if b=0, n:=1, s,h,p/v:=?         BUG
; b is decremented before it is used as port address
@@_ed_a3:
  inc r_hl              ;bug: no actual output
  dec r_b
  inc si                ;bug: no flag handling
  inc si
  nextop 16,0


;scf  1 4
@@_37:
  inc si
  and ah,0ech
  inc ah
  nextop 4,1