#include "sysconfig.h"
#include "sysdeps.h"
#include "config.h"
#include "options.h"
#include "machdep/m68k.h"
#include "memory.h"
#include "custom.h"
#include "readcpu.h"
#include "newcpu.h"
#include "compiler.h"
#include "cputbl.h"
void REGPARAM2 CPU_OP_NAME(_d038)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = (uae_s32)(uae_s16)get_iword(2);
{	uae_s8 src = get_byte(srca);
{	uae_s8 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel1: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d039)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = get_ilong(2);
{	uae_s8 src = get_byte(srca);
{	uae_s8 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
}}}}}}}m68k_incpc(6);
fill_prefetch_0();
endlabel2: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d03a)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_getpc() + 2;
	srca += (uae_s32)(uae_s16)get_iword(2);
{	uae_s8 src = get_byte(srca);
{	uae_s8 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel3: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d03b)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr tmppc = m68k_getpc() + 2;
	uaecptr srca = get_disp_ea(tmppc, get_iword(2));
{	uae_s8 src = get_byte(srca);
{	uae_s8 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel4: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d03c)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s8 src = get_ibyte(2);
{	uae_s8 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel5: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d040)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s16 src = m68k_dreg(regs, srcreg);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel6: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d048)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s16 src = m68k_areg(regs, srcreg);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel7: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d050)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg);
{	uae_s16 src = get_word(srca);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel8: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d058)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg);
{	uae_s16 src = get_word(srca);
	m68k_areg(regs, srcreg) += 2;
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel9: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d060)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) - 2;
{	uae_s16 src = get_word(srca);
	m68k_areg (regs, srcreg) = srca;
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel10: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d068)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2);
{	uae_s16 src = get_word(srca);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel11: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d070)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = get_disp_ea(m68k_areg(regs, srcreg), get_iword(2));
{	uae_s16 src = get_word(srca);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel12: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d078)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = (uae_s32)(uae_s16)get_iword(2);
{	uae_s16 src = get_word(srca);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel13: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d079)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = get_ilong(2);
{	uae_s16 src = get_word(srca);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}}m68k_incpc(6);
fill_prefetch_0();
endlabel14: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d07a)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_getpc() + 2;
	srca += (uae_s32)(uae_s16)get_iword(2);
{	uae_s16 src = get_word(srca);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel15: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d07b)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr tmppc = m68k_getpc() + 2;
	uaecptr srca = get_disp_ea(tmppc, get_iword(2));
{	uae_s16 src = get_word(srca);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel16: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d07c)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s16 src = get_iword(2);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel17: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d080)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s32 src = m68k_dreg(regs, srcreg);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel18: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d088)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s32 src = m68k_areg(regs, srcreg);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel19: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d090)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg);
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel20: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d098)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg);
{	uae_s32 src = get_long(srca);
	m68k_areg(regs, srcreg) += 4;
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel21: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0a0)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) - 4;
{	uae_s32 src = get_long(srca);
	m68k_areg (regs, srcreg) = srca;
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel22: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0a8)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2);
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel23: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0b0)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = get_disp_ea(m68k_areg(regs, srcreg), get_iword(2));
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel24: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0b8)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = (uae_s32)(uae_s16)get_iword(2);
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel25: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0b9)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = get_ilong(2);
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}}m68k_incpc(6);
fill_prefetch_0();
endlabel26: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0ba)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_getpc() + 2;
	srca += (uae_s32)(uae_s16)get_iword(2);
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel27: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0bb)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr tmppc = m68k_getpc() + 2;
	uaecptr srca = get_disp_ea(tmppc, get_iword(2));
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel28: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0bc)(uae_u32 opcode) /* ADD */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s32 src = get_ilong(2);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}m68k_incpc(6);
fill_prefetch_0();
endlabel29: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0c0)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s16 src = m68k_dreg(regs, srcreg);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel30: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0c8)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s16 src = m68k_areg(regs, srcreg);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel31: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0d0)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg);
{	uae_s16 src = get_word(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel32: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0d8)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg);
{	uae_s16 src = get_word(srca);
	m68k_areg(regs, srcreg) += 2;
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel33: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0e0)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) - 2;
{	uae_s16 src = get_word(srca);
	m68k_areg (regs, srcreg) = srca;
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel34: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0e8)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2);
{	uae_s16 src = get_word(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel35: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0f0)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = get_disp_ea(m68k_areg(regs, srcreg), get_iword(2));
{	uae_s16 src = get_word(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel36: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0f8)(uae_u32 opcode) /* ADDA */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = (uae_s32)(uae_s16)get_iword(2);
{	uae_s16 src = get_word(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel37: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0f9)(uae_u32 opcode) /* ADDA */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = get_ilong(2);
{	uae_s16 src = get_word(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(6);
fill_prefetch_0();
endlabel38: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0fa)(uae_u32 opcode) /* ADDA */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_getpc() + 2;
	srca += (uae_s32)(uae_s16)get_iword(2);
{	uae_s16 src = get_word(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel39: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0fb)(uae_u32 opcode) /* ADDA */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr tmppc = m68k_getpc() + 2;
	uaecptr srca = get_disp_ea(tmppc, get_iword(2));
{	uae_s16 src = get_word(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel40: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d0fc)(uae_u32 opcode) /* ADDA */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s16 src = get_iword(2);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel41: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d100)(uae_u32 opcode) /* ADDX */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s8 src = m68k_dreg(regs, srcreg);
{	uae_s8 dst = m68k_dreg(regs, dstreg);
{	uae_u32 newv = dst + src + (XFLG ? 1 : 0);
{	uae_u32 scratch;
{	int flgs = ((uae_s8)(src)) < 0;
	int flgo = ((uae_s8)(dst)) < 0;
	int flgn = ((uae_s8)(newv)) < 0;
	VFLG = (flgs && flgo && !flgn) || (!flgs && !flgo && flgn);
	XFLG = CFLG = (flgs && flgo) || (!flgn && (flgo || flgs));
{	uae_u32 scratch;
	if (((uae_s8)(newv)) != 0) ZFLG = 0;
	NFLG = ((uae_s8)(newv)) < 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel42: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d108)(uae_u32 opcode) /* ADDX */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
{	uae_s8 src = get_byte(srca);
	m68k_areg (regs, srcreg) = srca;
{	uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
{	uae_s8 dst = get_byte(dsta);
	m68k_areg (regs, dstreg) = dsta;
{	uae_u32 newv = dst + src + (XFLG ? 1 : 0);
{	uae_u32 scratch;
{	int flgs = ((uae_s8)(src)) < 0;
	int flgo = ((uae_s8)(dst)) < 0;
	int flgn = ((uae_s8)(newv)) < 0;
	VFLG = (flgs && flgo && !flgn) || (!flgs && !flgo && flgn);
	XFLG = CFLG = (flgs && flgo) || (!flgn && (flgo || flgs));
{	uae_u32 scratch;
	if (((uae_s8)(newv)) != 0) ZFLG = 0;
	NFLG = ((uae_s8)(newv)) < 0;
	put_byte(dsta,newv);
}}}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel43: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d110)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s8 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg);
{	uae_s8 dst = get_byte(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	put_byte(dsta,newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel44: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d118)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s8 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg);
{	uae_s8 dst = get_byte(dsta);
	m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	put_byte(dsta,newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel45: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d120)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s8 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
{	uae_s8 dst = get_byte(dsta);
	m68k_areg (regs, dstreg) = dsta;
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	put_byte(dsta,newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel46: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d128)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s8 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2);
{	uae_s8 dst = get_byte(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	put_byte(dsta,newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel47: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d130)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s8 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = get_disp_ea(m68k_areg(regs, dstreg), get_iword(2));
{	uae_s8 dst = get_byte(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	put_byte(dsta,newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel48: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d138)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
{{	uae_s8 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = (uae_s32)(uae_s16)get_iword(2);
{	uae_s8 dst = get_byte(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	put_byte(dsta,newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel49: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d139)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
{{	uae_s8 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = get_ilong(2);
{	uae_s8 dst = get_byte(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addb (newv, (uae_s8)(src), (uae_s8)(dst));
	put_byte(dsta,newv);
}}}}}}}m68k_incpc(6);
fill_prefetch_0();
endlabel50: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d140)(uae_u32 opcode) /* ADDX */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s16 src = m68k_dreg(regs, srcreg);
{	uae_s16 dst = m68k_dreg(regs, dstreg);
{	uae_u32 newv = dst + src + (XFLG ? 1 : 0);
{	uae_u32 scratch;
{	int flgs = ((uae_s16)(src)) < 0;
	int flgo = ((uae_s16)(dst)) < 0;
	int flgn = ((uae_s16)(newv)) < 0;
	VFLG = (flgs && flgo && !flgn) || (!flgs && !flgo && flgn);
	XFLG = CFLG = (flgs && flgo) || (!flgn && (flgo || flgs));
{	uae_u32 scratch;
	if (((uae_s16)(newv)) != 0) ZFLG = 0;
	NFLG = ((uae_s16)(newv)) < 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel51: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d148)(uae_u32 opcode) /* ADDX */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) - 2;
{	uae_s16 src = get_word(srca);
	m68k_areg (regs, srcreg) = srca;
{	uaecptr dsta = m68k_areg(regs, dstreg) - 2;
{	uae_s16 dst = get_word(dsta);
	m68k_areg (regs, dstreg) = dsta;
{	uae_u32 newv = dst + src + (XFLG ? 1 : 0);
{	uae_u32 scratch;
{	int flgs = ((uae_s16)(src)) < 0;
	int flgo = ((uae_s16)(dst)) < 0;
	int flgn = ((uae_s16)(newv)) < 0;
	VFLG = (flgs && flgo && !flgn) || (!flgs && !flgo && flgn);
	XFLG = CFLG = (flgs && flgo) || (!flgn && (flgo || flgs));
{	uae_u32 scratch;
	if (((uae_s16)(newv)) != 0) ZFLG = 0;
	NFLG = ((uae_s16)(newv)) < 0;
	put_word(dsta,newv);
}}}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel52: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d150)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s16 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg);
{	uae_s16 dst = get_word(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	put_word(dsta,newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel53: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d158)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s16 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg);
{	uae_s16 dst = get_word(dsta);
	m68k_areg(regs, dstreg) += 2;
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	put_word(dsta,newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel54: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d160)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s16 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg) - 2;
{	uae_s16 dst = get_word(dsta);
	m68k_areg (regs, dstreg) = dsta;
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	put_word(dsta,newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel55: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d168)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s16 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2);
{	uae_s16 dst = get_word(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	put_word(dsta,newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel56: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d170)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s16 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = get_disp_ea(m68k_areg(regs, dstreg), get_iword(2));
{	uae_s16 dst = get_word(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	put_word(dsta,newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel57: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d178)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
{{	uae_s16 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = (uae_s32)(uae_s16)get_iword(2);
{	uae_s16 dst = get_word(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	put_word(dsta,newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel58: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d179)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
{{	uae_s16 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = get_ilong(2);
{	uae_s16 dst = get_word(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addw (newv, (uae_s16)(src), (uae_s16)(dst));
	put_word(dsta,newv);
}}}}}}}m68k_incpc(6);
fill_prefetch_0();
endlabel59: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d180)(uae_u32 opcode) /* ADDX */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s32 src = m68k_dreg(regs, srcreg);
{	uae_s32 dst = m68k_dreg(regs, dstreg);
{	uae_u32 newv = dst + src + (XFLG ? 1 : 0);
{	uae_u32 scratch;
{	int flgs = ((uae_s32)(src)) < 0;
	int flgo = ((uae_s32)(dst)) < 0;
	int flgn = ((uae_s32)(newv)) < 0;
	VFLG = (flgs && flgo && !flgn) || (!flgs && !flgo && flgn);
	XFLG = CFLG = (flgs && flgo) || (!flgn && (flgo || flgs));
{	uae_u32 scratch;
	if (((uae_s32)(newv)) != 0) ZFLG = 0;
	NFLG = ((uae_s32)(newv)) < 0;
	m68k_dreg(regs, dstreg) = (newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel60: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d188)(uae_u32 opcode) /* ADDX */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) - 4;
{	uae_s32 src = get_long(srca);
	m68k_areg (regs, srcreg) = srca;
{	uaecptr dsta = m68k_areg(regs, dstreg) - 4;
{	uae_s32 dst = get_long(dsta);
	m68k_areg (regs, dstreg) = dsta;
{	uae_u32 newv = dst + src + (XFLG ? 1 : 0);
{	uae_u32 scratch;
{	int flgs = ((uae_s32)(src)) < 0;
	int flgo = ((uae_s32)(dst)) < 0;
	int flgn = ((uae_s32)(newv)) < 0;
	VFLG = (flgs && flgo && !flgn) || (!flgs && !flgo && flgn);
	XFLG = CFLG = (flgs && flgo) || (!flgn && (flgo || flgs));
{	uae_u32 scratch;
	if (((uae_s32)(newv)) != 0) ZFLG = 0;
	NFLG = ((uae_s32)(newv)) < 0;
	put_long(dsta,newv);
}}}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel61: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d190)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s32 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg);
{	uae_s32 dst = get_long(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	put_long(dsta,newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel62: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d198)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s32 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg);
{	uae_s32 dst = get_long(dsta);
	m68k_areg(regs, dstreg) += 4;
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	put_long(dsta,newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel63: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1a0)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s32 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg) - 4;
{	uae_s32 dst = get_long(dsta);
	m68k_areg (regs, dstreg) = dsta;
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	put_long(dsta,newv);
}}}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel64: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1a8)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s32 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2);
{	uae_s32 dst = get_long(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	put_long(dsta,newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel65: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1b0)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s32 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = get_disp_ea(m68k_areg(regs, dstreg), get_iword(2));
{	uae_s32 dst = get_long(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	put_long(dsta,newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel66: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1b8)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
{{	uae_s32 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = (uae_s32)(uae_s16)get_iword(2);
{	uae_s32 dst = get_long(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	put_long(dsta,newv);
}}}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel67: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1b9)(uae_u32 opcode) /* ADD */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
{{	uae_s32 src = m68k_dreg(regs, srcreg);
{	uaecptr dsta = get_ilong(2);
{	uae_s32 dst = get_long(dsta);
{{	uae_u32 scratch;
{	uae_u32 newv;
	x86_flag_addl (newv, (uae_s32)(src), (uae_s32)(dst));
	put_long(dsta,newv);
}}}}}}}m68k_incpc(6);
fill_prefetch_0();
endlabel68: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1c0)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s32 src = m68k_dreg(regs, srcreg);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel69: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1c8)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s32 src = m68k_areg(regs, srcreg);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel70: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1d0)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg);
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel71: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1d8)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg);
{	uae_s32 src = get_long(srca);
	m68k_areg(regs, srcreg) += 4;
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel72: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1e0)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) - 4;
{	uae_s32 src = get_long(srca);
	m68k_areg (regs, srcreg) = srca;
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel73: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1e8)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2);
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel74: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1f0)(uae_u32 opcode) /* ADDA */
{
	uae_u32 srcreg = (opcode & 7);
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = get_disp_ea(m68k_areg(regs, srcreg), get_iword(2));
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel75: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1f8)(uae_u32 opcode) /* ADDA */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = (uae_s32)(uae_s16)get_iword(2);
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel76: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1f9)(uae_u32 opcode) /* ADDA */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = get_ilong(2);
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(6);
fill_prefetch_0();
endlabel77: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1fa)(uae_u32 opcode) /* ADDA */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr srca = m68k_getpc() + 2;
	srca += (uae_s32)(uae_s16)get_iword(2);
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel78: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1fb)(uae_u32 opcode) /* ADDA */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uaecptr tmppc = m68k_getpc() + 2;
	uaecptr srca = get_disp_ea(tmppc, get_iword(2));
{	uae_s32 src = get_long(srca);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}}m68k_incpc(4);
fill_prefetch_0();
endlabel79: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_d1fc)(uae_u32 opcode) /* ADDA */
{
	uae_u32 dstreg = (opcode >> 9) & 7;
{{	uae_s32 src = get_ilong(2);
{	uae_s32 dst = m68k_areg(regs, dstreg);
{	uae_u32 newv = dst + src;
	m68k_areg(regs, dstreg) = (newv);
}}}}m68k_incpc(6);
fill_prefetch_0();
endlabel80: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e000)(uae_u32 opcode) /* ASR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s8 data = m68k_dreg(regs, dstreg);
{	uae_u8 val = data;
	uae_u32 cmask = 0x80;
	uae_u32 sign = cmask & val;
	cnt &= 63;
	VFLG = 0;
	if (!cnt) { CFLG = 0; } else {
	if (cnt >= 8) {
		val = sign ? 0xff : 0;
		CFLG=XFLG= sign ? 1 : 0;
	} else {
		CFLG=XFLG=(val >> (cnt-1)) & 1;
		val >>= cnt;
		if (sign) val |= 0xff << (8 - cnt);
	}}
	NFLG = sign != 0;
	ZFLG = val == 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel81: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e008)(uae_u32 opcode) /* LSR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s8 data = m68k_dreg(regs, dstreg);
{	uae_u8 val = data;
	uae_u32 cmask = 0x80;
	cnt &= 63;
	if (!cnt) { CFLG = 0; } else {
	if (cnt >= 8) {
		CFLG=XFLG = cnt == 8 ? (val & cmask ? 1 : 0) : 0;
		val = 0;
	} else {
		CFLG=XFLG=(val >> (cnt-1)) & 1;
		val >>= cnt;
	}}
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel82: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e010)(uae_u32 opcode) /* ROXR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s8 data = m68k_dreg(regs, dstreg);
{	uae_u8 val = data;
	uae_u32 cmask = 0x80;
	uae_u32 carry;
	cnt &= 63;
	for(;cnt;--cnt){
	carry=val&1; val >>= 1;
	if(XFLG) val |= cmask;
	XFLG = carry;
	}
	CFLG = XFLG;
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel83: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e018)(uae_u32 opcode) /* ROR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s8 data = m68k_dreg(regs, dstreg);
{	uae_u8 val = data;
	uae_u32 cmask = 0x80;
	cnt &= 63;
	if (!cnt) { CFLG = 0; } else {	uae_u32 carry;
	for(;cnt;--cnt){
	carry=val&1; val = val >> 1;
	if(carry) val |= cmask;
	}
	CFLG = carry;
}
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel84: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e020)(uae_u32 opcode) /* ASR */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s8 cnt = m68k_dreg(regs, srcreg);
{	uae_s8 data = m68k_dreg(regs, dstreg);
{	uae_u8 val = data;
	uae_u32 cmask = 0x80;
	uae_u32 sign = cmask & val;
	cnt &= 63;
	VFLG = 0;
	if (!cnt) { CFLG = 0; } else {
	if (cnt >= 8) {
		val = sign ? 0xff : 0;
		CFLG=XFLG= sign ? 1 : 0;
	} else {
		CFLG=XFLG=(val >> (cnt-1)) & 1;
		val >>= cnt;
		if (sign) val |= 0xff << (8 - cnt);
	}}
	NFLG = sign != 0;
	ZFLG = val == 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel85: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e028)(uae_u32 opcode) /* LSR */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s8 cnt = m68k_dreg(regs, srcreg);
{	uae_s8 data = m68k_dreg(regs, dstreg);
{	uae_u8 val = data;
	uae_u32 cmask = 0x80;
	cnt &= 63;
	if (!cnt) { CFLG = 0; } else {
	if (cnt >= 8) {
		CFLG=XFLG = cnt == 8 ? (val & cmask ? 1 : 0) : 0;
		val = 0;
	} else {
		CFLG=XFLG=(val >> (cnt-1)) & 1;
		val >>= cnt;
	}}
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel86: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e030)(uae_u32 opcode) /* ROXR */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s8 cnt = m68k_dreg(regs, srcreg);
{	uae_s8 data = m68k_dreg(regs, dstreg);
{	uae_u8 val = data;
	uae_u32 cmask = 0x80;
	uae_u32 carry;
	cnt &= 63;
	for(;cnt;--cnt){
	carry=val&1; val >>= 1;
	if(XFLG) val |= cmask;
	XFLG = carry;
	}
	CFLG = XFLG;
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel87: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e038)(uae_u32 opcode) /* ROR */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s8 cnt = m68k_dreg(regs, srcreg);
{	uae_s8 data = m68k_dreg(regs, dstreg);
{	uae_u8 val = data;
	uae_u32 cmask = 0x80;
	cnt &= 63;
	if (!cnt) { CFLG = 0; } else {	uae_u32 carry;
	for(;cnt;--cnt){
	carry=val&1; val = val >> 1;
	if(carry) val |= cmask;
	}
	CFLG = carry;
}
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel88: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e040)(uae_u32 opcode) /* ASR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s16 data = m68k_dreg(regs, dstreg);
{	uae_u16 val = data;
	uae_u32 cmask = 0x8000;
	uae_u32 sign = cmask & val;
	cnt &= 63;
	VFLG = 0;
	if (!cnt) { CFLG = 0; } else {
	if (cnt >= 16) {
		val = sign ? 0xffff : 0;
		CFLG=XFLG= sign ? 1 : 0;
	} else {
		CFLG=XFLG=(val >> (cnt-1)) & 1;
		val >>= cnt;
		if (sign) val |= 0xffff << (16 - cnt);
	}}
	NFLG = sign != 0;
	ZFLG = val == 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel89: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e048)(uae_u32 opcode) /* LSR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s16 data = m68k_dreg(regs, dstreg);
{	uae_u16 val = data;
	uae_u32 cmask = 0x8000;
	cnt &= 63;
	if (!cnt) { CFLG = 0; } else {
	if (cnt >= 16) {
		CFLG=XFLG = cnt == 16 ? (val & cmask ? 1 : 0) : 0;
		val = 0;
	} else {
		CFLG=XFLG=(val >> (cnt-1)) & 1;
		val >>= cnt;
	}}
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel90: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e050)(uae_u32 opcode) /* ROXR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s16 data = m68k_dreg(regs, dstreg);
{	uae_u16 val = data;
	uae_u32 cmask = 0x8000;
	uae_u32 carry;
	cnt &= 63;
	for(;cnt;--cnt){
	carry=val&1; val >>= 1;
	if(XFLG) val |= cmask;
	XFLG = carry;
	}
	CFLG = XFLG;
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel91: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e058)(uae_u32 opcode) /* ROR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s16 data = m68k_dreg(regs, dstreg);
{	uae_u16 val = data;
	uae_u32 cmask = 0x8000;
	cnt &= 63;
	if (!cnt) { CFLG = 0; } else {	uae_u32 carry;
	for(;cnt;--cnt){
	carry=val&1; val = val >> 1;
	if(carry) val |= cmask;
	}
	CFLG = carry;
}
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel92: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e060)(uae_u32 opcode) /* ASR */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s16 cnt = m68k_dreg(regs, srcreg);
{	uae_s16 data = m68k_dreg(regs, dstreg);
{	uae_u16 val = data;
	uae_u32 cmask = 0x8000;
	uae_u32 sign = cmask & val;
	cnt &= 63;
	VFLG = 0;
	if (!cnt) { CFLG = 0; } else {
	if (cnt >= 16) {
		val = sign ? 0xffff : 0;
		CFLG=XFLG= sign ? 1 : 0;
	} else {
		CFLG=XFLG=(val >> (cnt-1)) & 1;
		val >>= cnt;
		if (sign) val |= 0xffff << (16 - cnt);
	}}
	NFLG = sign != 0;
	ZFLG = val == 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel93: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e068)(uae_u32 opcode) /* LSR */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s16 cnt = m68k_dreg(regs, srcreg);
{	uae_s16 data = m68k_dreg(regs, dstreg);
{	uae_u16 val = data;
	uae_u32 cmask = 0x8000;
	cnt &= 63;
	if (!cnt) { CFLG = 0; } else {
	if (cnt >= 16) {
		CFLG=XFLG = cnt == 16 ? (val & cmask ? 1 : 0) : 0;
		val = 0;
	} else {
		CFLG=XFLG=(val >> (cnt-1)) & 1;
		val >>= cnt;
	}}
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel94: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e070)(uae_u32 opcode) /* ROXR */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s16 cnt = m68k_dreg(regs, srcreg);
{	uae_s16 data = m68k_dreg(regs, dstreg);
{	uae_u16 val = data;
	uae_u32 cmask = 0x8000;
	uae_u32 carry;
	cnt &= 63;
	for(;cnt;--cnt){
	carry=val&1; val >>= 1;
	if(XFLG) val |= cmask;
	XFLG = carry;
	}
	CFLG = XFLG;
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel95: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e078)(uae_u32 opcode) /* ROR */
{
	uae_u32 srcreg = ((opcode >> 9) & 7);
	uae_u32 dstreg = opcode & 7;
{{	uae_s16 cnt = m68k_dreg(regs, srcreg);
{	uae_s16 data = m68k_dreg(regs, dstreg);
{	uae_u16 val = data;
	uae_u32 cmask = 0x8000;
	cnt &= 63;
	if (!cnt) { CFLG = 0; } else {	uae_u32 carry;
	for(;cnt;--cnt){
	carry=val&1; val = val >> 1;
	if(carry) val |= cmask;
	}
	CFLG = carry;
}
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel96: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e080)(uae_u32 opcode) /* ASR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s32 data = m68k_dreg(regs, dstreg);
{	uae_u32 val = data;
	uae_u32 cmask = 0x80000000;
	uae_u32 sign = cmask & val;
	cnt &= 63;
	VFLG = 0;
	if (!cnt) { CFLG = 0; } else {
	if (cnt >= 32) {
		val = sign ? 0xffffffff : 0;
		CFLG=XFLG= sign ? 1 : 0;
	} else {
		CFLG=XFLG=(val >> (cnt-1)) & 1;
		val >>= cnt;
		if (sign) val |= 0xffffffff << (32 - cnt);
	}}
	NFLG = sign != 0;
	ZFLG = val == 0;
	m68k_dreg(regs, dstreg) = (val);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel97: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e088)(uae_u32 opcode) /* LSR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s32 data = m68k_dreg(regs, dstreg);
{	uae_u32 val = data;
	uae_u32 cmask = 0x80000000;
	cnt &= 63;
	if (!cnt) { CFLG = 0; } else {
	if (cnt >= 32) {
		CFLG=XFLG = cnt == 32 ? (val & cmask ? 1 : 0) : 0;
		val = 0;
	} else {
		CFLG=XFLG=(val >> (cnt-1)) & 1;
		val >>= cnt;
	}}
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (val);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel98: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e090)(uae_u32 opcode) /* ROXR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s32 data = m68k_dreg(regs, dstreg);
{	uae_u32 val = data;
	uae_u32 cmask = 0x80000000;
	uae_u32 carry;
	cnt &= 63;
	for(;cnt;--cnt){
	carry=val&1; val >>= 1;
	if(XFLG) val |= cmask;
	XFLG = carry;
	}
	CFLG = XFLG;
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (val);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel99: (void)0;
}
void REGPARAM2 CPU_OP_NAME(_e098)(uae_u32 opcode) /* ROR */
{
	uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)];
	uae_u32 dstreg = opcode & 7;
{{	uae_u32 cnt = srcreg;
{	uae_s32 data = m68k_dreg(regs, dstreg);
{	uae_u32 val = data;
	uae_u32 cmask = 0x80000000;
	cnt &= 63;
	if (!cnt) { CFLG = 0; } else {	uae_u32 carry;
	for(;cnt;--cnt){
	carry=val&1; val = val >> 1;
	if(carry) val |= cmask;
	}
	CFLG = carry;
}
	NFLG = (val & cmask) != 0; ZFLG = val == 0; VFLG = 0;
	m68k_dreg(regs, dstreg) = (val);
}}}}m68k_incpc(2);
fill_prefetch_2();
endlabel100: (void)0;
}