# CtrlD()(BOOL)

	.sdreg	r2
	.global	_CtrlD

_CtrlD:	mflr	r0
	stw	r0,8(r1)
	stwu	r1,-32(r1)

	li	r4,0
	li	r5,0
	lwz	r3,_PowerPCBase(r2)
	lwz	r0,-478(r3)	# SetSignalPPC()
	mtlr	r0
	blrl

	andi.	r0,r3,8192	# btst	#13,d0
	beq	.no

	li	r4,0
	li	r5,8192
	lwz	r3,_PowerPCBase(r2)
	lwz	r0,-478(r3)	# SetSignalPPC()
	mtlr	r0
	blrl
	
.yes:	li	r3,-1
	b	.finish
.no:	li	r3,0
.finish:	addi	r1,r1,32
	lwz	r0,8(r1)
	mtlr	r0
	blr

	.type	_CtrlD,@function
	.size	_CtrlD,$-_CtrlD
	.extern	_PowerPCBase