;--------------------------------------
	;--  TETRAGON V2.2 DECRUNCH ROUTINE  --
	;--------------------------------------

		xdef	_Decrunch1
		xdef	_Decrunch2

		section detetragon,code

_Decrunch1	movem.l d2-d4/a2,-(sp)		;store registers

						;in a0: end of obj
						;in a1: tmp_buffer (for first pass)
		lea	cr1(pc),a2
		move.l	d0,(a2)+		;store cr1
		move.l	d1,(a2)+		;store cr2
		move.l	d2,(a2)+		;store cr3

		lea	cr5(pc),a2
		move.b	d3,(a2)+		;store cr5
		move.b	d4,(a2)+		;store cr6

		movem.l	d0-d1/a0/a1/a6,-(sp)
		move.l	4,a6
		jsr	-$027C(a6)		;CacheClearU for use with 040 or more
		movem.l	(sp)+,d0-d1/a0/a1/a6
;-------------------------------------------------
start1		move.l	-(a0),a2
		add.l	a1,a2

		move.l	-(a0),d0
l056		lsr.l	#1,d0
		bne.s	l05c
		bsr.s	l090
l05c		bcs.s	l0c8
		move.l	cr1(pc),d1		;cr1
		moveq	#1,d3
		lsr.l	#1,d0
		bne.s	l068
		bsr.s	l090
l068		bcs.s	l0a6
		moveq	#3,d1
		moveq	#0,d4
l06e		bsr.s	l0b6
		move.w	d2,d3
		add.w	d4,d3
l074		moveq	#7,d1
l076		lsr.l	#1,d0
		bne.s	l07c
		bsr.s	l090
l07c		roxl.l	#1,d2
		dbra	d1,l076
		move.b	d2,-(a2)
		dbra	d3,l074
		bra.s	l0b0

l08a		moveq	#7,d1
		moveq	#8,d4
		bra.s	l06e

l090		move.l	-(a0),d0
		move.w	#$10,CCR
		roxr.l	#1,d0
		rts

l09e		move.l	cr2(pc),d1		;cr2
		move.w	d2,d3
cr5		dc.b	0			;cr5 + cr6
cr6		dc.b	0
		addq.w	#2,d3
l0a6		bsr.s	l0b6
l0a8		move.b	-1(a2,d2.w),-(a2)
		dbra	d3,l0a8
l0b0		cmp.l	a2,a1
		blt.s	l056
exit1		movem.l (sp)+,d2-d4/a2		;restore used registers
		rts

l0b6		subq.w	#1,d1
		moveq	#0,d2
l0ba		lsr.l	#1,d0
		bne.s	l0c0
		bsr.s	l090
l0c0		roxl.l	#1,d2
		dbra	d1,l0ba
		rts

l0c8		moveq	#2,d1
		bsr.s	l0b6
		cmp.b	#2,d2
		blt.s	l09e
		cmp.b	#3,d2
		beq.s	l08a
		moveq	#8,d1
		bsr.s	l0b6
		move.w	d2,d3
		addq.w	#4,d3
		move.l	cr3(pc),d1		;cr3
		bra.s	l0a6

cr1		ds.l	1
cr2		ds.l	1
cr3		ds.l	1
;-------------------------------------------------
_Decrunch2	movem.l d2/a2,-(sp)		;store registers

						;in d2 cr4
						;in a0 destbuffer
						;in a1 tempbuffer
						;in a2 end of destbuffer
again		move.b	(a1)+,d0
		cmp.b	d2,d0
		bne.s	notexpand
		moveq	#0,d1
		move.b	(a1)+,d1
		beq.s	notexpand
		move.b	(a1)+,d0
		addq.w	#1,d1
expand		move.b	d0,(a0)+
		dbra	d1,expand
notexpand	move.b	d0,(a0)+
		cmp.l	a2,a0
		blt.s	again

exit2		movem.l (sp)+,d2/a2		;restore used registers
		rts

		END