/*
 |  Hardware registers
*/

#ifndef _HAVE_HARDWARE_H_
#define _HAVE_HARDWARE_H_

#define hz	50

/* Video hardware */
#define	COP1LC		((unsigned int*)0x0dff080)
#define	COPJMP1		((unsigned int*)0x0dff088)
#define	VPOSR		((unsigned short*)0x0dff004)
#define	VHPOSR		((unsigned short*)0x0dff006)
#define	DMACON		((unsigned short*)0x0dff096)

/* Keyboard / CIA-A */
#define CIAA_PRA	((unsigned char*)0x0bfe001)
#define CIAA_PRB	((unsigned char*)0x0bfe101)
#define	CIAA_TALO	((unsigned char*)0x0bfe401)
#define	CIAA_TAHI	((unsigned char*)0x0bfe501)
#define	CIAA_TBLO	((unsigned char*)0x0bfe601)
#define	CIAA_TBHI	((unsigned char*)0x0bfe701)
#define	CIAA_SDR	((unsigned char*)0x0bfec01)
#define	CIAA_ICR	((unsigned char*)0x0bfed01)
#define	CIAA_CRA	((unsigned char*)0x0bfee01)
#define	CIAA_CRB	((unsigned char*)0x0bfef01)

/* Disky bits / CIA-B */
#define CIAB_PRA	((unsigned char*)0x0bfd000)
#define CIAB_PRB	((unsigned char*)0x0bfd100)
#define	CIAB_TALO	((unsigned char*)0x0bfd400)
#define	CIAB_TAHI	((unsigned char*)0x0bfd500)
#define	CIAB_TBLO	((unsigned char*)0x0bfd600)
#define	CIAB_TBHI	((unsigned char*)0x0bfd700)
#define	CIAB_SDR	((unsigned char*)0x0bfdc00)
#define	CIAB_ICR	((unsigned char*)0x0bfdd00)
#define	CIAB_CRA	((unsigned char*)0x0bfde00)
#define	CIAB_CRB	((unsigned char*)0x0bfdf00)

/* Interrupts and so forth */
#define	INTENA		((unsigned short*)0x0dff09a)
#define	INTENAR		((unsigned short*)0x0dff01c)
#define	INTREQ		((unsigned short*)0x0dff09c)
#define INTREQR		((unsigned short*)0x0dff01e)

/* Floppy disks and sudry others */
#define DSKSYNC		((unsigned short*)0x0dff07e)
#define ADKCON		((unsigned short*)0x0dff09e)
#define DSKPT		((char**)0x0dff020)
#define DSKLEN		((unsigned short*)0x0dff024)


/* Interrupt masks */
#define INT_TBE		(0x0001)
#define INT_DSKBLK	(0x0002)
#define INT_SOFT	(0x0004)
#define INT_PORTS	(0x0008)
#define INT_COPER	(0x0010)
#define INT_VERTB	(0x0020)
#define INT_BLIT	(0x0040)
#define INT_AUD0	(0x0080)
#define INT_AUD1	(0x0100)
#define INT_AUD2	(0x0200)
#define INT_AUD3	(0x0400)
#define INT_RBF		(0x0800)
#define INT_DSKSYN	(0x1000)
#define INT_EXTER	(0x2000)
#define INT_INTEN	(0x4000)


/* CPU exception meanings */
#define X_BUSERR	(2)
#define X_ADDERR	(3)
#define X_ILLI		(4)
#define X_DIV0		(5)
#define X_CHK		(6)
#define X_TRAPV		(7)
#define X_PRIV		(8)
#define X_TRACE		(9)
#define X_ALINE		(10)
#define X_FLINE		(11)


#endif