blitwait	macro	
bw\@:		btst	#$0e,$dff002
			bne.s	bw\@
			endm

Cwait		MACRO
			DC.B	\1,\2+9,$FF,$FE	
			ENDM
Cskip:		MACRO
			DC.B	\1,\2+9,$FF,$FF	
			ENDM
Cmove		MACRO
			DC.W	\1,\2			
			ENDM
	

*********************************************************************************************
;Co-processor Macros

end_copper	Macro
			dc.w $ffff,$fffe
			Endm

set_pal		Macro
			dc.w $ffdf,$fffe
			Endm


*********************************************************************************************
			
save_all	Macro
			movem.l	a0-a6/d0-d7,-(sp)
			Endm
			
return_all	Macro
			movem.l	(sp)+,d0-d7/a0-a6
			Endm


******************************************************************************************

KillSys	macro
	MOVE.L	$4,A6
	move.l	(A6),a6
	move.l	(A6),a6
	move.l	38(a6),oldcop
	MOVE.W	$DFF01C,IntEnSave
	MOVE.W	$DFF01E,IntRqSave
	MOVE.W	$DFF002,DMASave
	MOVE.W	$DFF010,ADKSave
	MOVE.W	#%0111111111111111,$DFF096	
	MOVE.W	#%0111111111111111,$DFF09A
	CLR.W	$DFF088
	MOVE.W	#%1000011111000000,$DFF096
	bra		otasasas

oldcop		dc.l	0
InitialSP	DC.L	0
IntEnSave	DC.W	0	
IntRqSave	DC.W	0
DMASave		DC.W	0
ADKSave		DC.W	0
otasasas	
	endm


ResSys	Macro
	MOVE.W	IntEnSave,D7
	BSET	#$F,D7
	MOVE.W	D7,$DFF09A
	MOVE.W	IntRqSave,D7
	BSET	#$F,D7
	MOVE.W	D7,$DFF09C
	MOVE.W	DMASave,D7
	BSET	#$F,D7
	MOVE.W	D7,$DFF096
	MOVE.W	ADKSave,D7
	BSET	#$F,D7
	MOVE.W	D7,$DFF09E
	move.l	oldcop,$dff080
	endm
	

; 68000 status register bits.

; Custom chip registers.

custom:  equ $dff000
bltddat: equ $000
dmaconr: equ $002
vposr:   equ $004
vhposr:  equ $006
dskdatr: equ $009
joy0dat: equ $00a
joy1dat: equ $00c
clxdat:  equ $00e
adkconr: equ $010
pot0dat: equ $012
pot1dat: equ $014
potgor:  equ $016
serdatr: equ $018
dskbytr: equ $01a
intenar: equ $01c
intreqr: equ $01e
dskpth:  equ $020
dskptl:  equ $022
dsklen:  equ $024
dskdat:  equ $026
refptr:  equ $028
vposw:   equ $02a
vhposw:  equ $02c
copcon:  equ $02e
serdat:  equ $030
serper:  equ $032
potgo:   equ $034
joytest: equ $036
strequ:  equ $038
strvbl:  equ $03a
strhor:  equ $03c
strlong: equ $03e
bltcon0: equ $040
bltcon1: equ $042
bltafwm: equ $044
bltalwm: equ $046
bltcpth: equ $048
bltcptl: equ $04a
bltbpth: equ $04c
bltbptl: equ $04e
bltapth: equ $050
bltaptl: equ $052
bltdpth: equ $054
bltdptl: equ $056
bltsize: equ $058
bltcmod: equ $060
bltbmod: equ $062
bltamod: equ $064
bltdmod: equ $066
bltcdat: equ $070
bltbdat: equ $072
bltadat: equ $074
dsksync: equ $07e
cop1lch: equ $080
cop1lcl: equ $082
cop2lch: equ $084
cop2lcl: equ $086
copjmp1: equ $088
copjmp2: equ $08a
copins:  equ $08c
diwstrt: equ $08e
diwstop: equ $090
ddfstrt: equ $092
ddfstop: equ $094
dmacon:  equ $096
clxcon:  equ $098
intena:  equ $09a
intreq:  equ $09c
adkcon:  equ $09e
aud0lch: equ $0a0
aud0lcl: equ $0a2
aud0len: equ $0a4
aud0per: equ $0a6
aud0vol: equ $0a8
aud0dat: equ $0aa
aud1lch: equ $0b0
audilcl: equ $0b2
aud1len: equ $0b4
aud1per: equ $0b6
aud1vol: equ $0b8
aud1dat: equ $0ba
aud2lch: equ $0c0
aud2lcl: equ $0c2
aud2len: equ $0c4
aud2per: equ $0c6
aud2vol: equ $0c8
aud2dat: equ $0ca
aud3lch: equ $0d0
aud3lcl: equ $0d2
aud3len: equ $0d4
aud3per: equ $0d6
aud3vol: equ $0d8
aud3dat: equ $0da
bpl1pth: equ $0e0
bpl1ptl: equ $0e2
bpl2pth: equ $0e4
bpl2ptl: equ $0e6
bpl3pth: equ $0e8
bpl3ptl: equ $0ea
bpl4pth: equ $0ec
bpl4ptl: equ $0ee
bpl5pth: equ $0f0
bpl5ptl: equ $0f2
bpl6pth: equ $0f4
bpl6ptl: equ $0f6
bplcon0: equ $100
bplcon1: equ $102
bplcon2: equ $104
bpl1mod: equ $108
bpl2mod: equ $10a
bpl1dat: equ $110
bpl2dat: equ $112
bpl3dat: equ $114
bpl4dat: equ $116
bpl5dat: equ $118
bpl6dat: equ $11a
spr0pth: equ $120
spr0ptl: equ $122
spr1pth: equ $124
spr1ptl: equ $126
spr2pth: equ $128
spr2ptl: equ $12a
spr3pth: equ $12c
spr3ptl: equ $12e
spr4pth: equ $130
spr4ptl: equ $132
spr5pth: equ $134
spr5ptl: equ $136
spr6pth: equ $138
spr6ptl: equ $13a
spr7pth: equ $13c
spr7ptl: equ $13e
spr0pos: equ $140
spr0ctl: equ $142
spr0data:equ $144
spr0datb:equ $146
spr1pos: equ $148
spr1ctl: equ $14a
spr1data:equ $14c
spr1datb:equ $14e
spr2pos: equ $150
spr2ctl: equ $152
spr2data:equ $154
spr2datb:equ $156
spr3pos: equ $158
spr3ctl: equ $15a
spr3data:equ $15c
spr3datb:equ $15e
spr4pos: equ $160
spr4ctl: equ $162
spr4data:equ $164
spr4datb:equ $166
spr5pos: equ $168
spr5ctl: equ $16a
spr5data:equ $16c
spr5datb:equ $16e
spr6pos: equ $170
spr6ctl: equ $172
spr6data:equ $174
spr6datb:equ $176
spr7pos: equ $178
spr7ctl: equ $17a
spr7data:equ $17c
spr7datb:equ $17e
color00: equ $180
color01: equ $182
color02: equ $184
color03: equ $186
color04: equ $188
color05: equ $18a
color06: equ $18c
color07: equ $18e
color08: equ $190
color09: equ $192
color10: equ $194
color11: equ $196
color12: equ $198
color13: equ $19a
color14: equ $19c
color15: equ $19e
color16: equ $1a0
color17: equ $1a2
color18: equ $1a4
color19: equ $1a6
color20: equ $1a8
color21: equ $1aa
color22: equ $1ac
color23: equ $1ae
color24: equ $1b0
color25: equ $1b2
color26: equ $1b4
color27: equ $1b6
color28: equ $1b8
color29: equ $1ba
color30: equ $1bc
color31: equ $1be



tbe:    equ 0
dskblk: equ 1
soft:   equ 2
ports:  equ 3
coper:  equ 4
vertb:  equ 5
blit:   equ 6
aud0:   equ 7
aud1:   equ 8
aud2:   equ 9
aud3:   equ 10
rbf:    equ 11
dsksyn: equ 12
exter:  equ 13
inten:  equ 14

; 8250 CIA's port definitions.

ciaa:   equ $bfe001
ciab:   equ $bfd000
pra:    equ $000
prb:    equ $100
ddra:   equ $200
ddrb:   equ $300
talo:   equ $400
tahi:   equ $500
tblo:   equ $600
tbhi:   equ $700
event:  equ $800
sdr:    equ $c00
icr:    equ $d00
cra:    equ $e00
crb:    equ $f00

; CIA A port #A usage.

ovl:    equ 0
led:    equ 1
chng:   equ 2
wrpo:   equ 3
tk0:    equ 4
rdy:    equ 5
fir0:   equ 6
fir1:   equ 7

; CIA B port A usage.

busy:   equ 0
pout:   equ 1
sel:    equ 2
dsr:    equ 3
cts:    equ 4
cd:     equ 5
rts:    equ 6
dtr:    equ 7

; CIA B port B usage.

step:   equ 0
dir:    equ 1
side:   equ 2
sel0:   equ 3
sel1:   equ 4
sel2:   equ 5
sel3:   equ 6
mtr:    equ 7

skeys=$bfec01