\newpage
\section{The WOL pad library and \putindex{pad generator}}

  A set of library pads exist for \NEWOL.  A complete pad family, containing
both analog and digital pads is located in /LIB/WOLLIB/PADLIB.  These pads
are implemented in double-metal 3u feature-size CMOS, and provide a 150u
square bonding area.  The pads, and their applications, are:

\begin{tabular}{ll}
INPAD   &  Input pad, 200$\Omega$ resistance, and static protection.  \\
INORPAD &  Input pad, static protection, no resistor.                 \\
METALPAD&  Bare metal pad, no static protection.                      \\
OUTPAD  &  Non-inverting digital output pad, 50$\Omega$ drive.        \\
FOLLOWPAD & Wide range follower to drive analog signals               \\
VDDPAD & Provide Vdd to chip core and pad ring                        \\
GNDPAD & Provide Gnd to chip core and pad ring                        \\
CVDDPAD & Provide Vdd to chip core only                               \\
PVDDPAD & Provide Vdd to pad ring only                                \\
CGNDPAD & Provide Gnd to chip core only                               \\
PGNDPAD & Provide Gnd to pad ring only                                \\
CORNPAD & Corner of the pad ring                                      \\
SPCPAD & No pad, just run pad ring and protection
\end{tabular}

   A WOLCOMP module that implements a pad generator is also
available:  link your program with /LIB/WOLLIB/PADLIB/PADGEN.  A sample
program is shown below (it is taken from /LIB/WOLLIB/PADLIB/PADSAMPLE.TEXT):

{\footnotesize \tt
\begin{verbatim}

program sample (input, output);
import general_2, graphics, misc, hpib_2, newci, 

   { N O T E:   you will need to 'perm /lib/wollib/wolcomp'
                             and 'perm /lib/wollib/padlib/padgen'

                BEFORE trying to run this program!!!
    }
   $search '/LIB/WOLLIB/WOLCOMP'$  wolcomplib,
   $search '/LIB/WOLLIB/PADLIB/PADGEN'$  pad_gen ;

var my_pads  :  pad_spec;    { this is the structure used to specify to
                               the pad generator what pads you want, and
                               where they should go}

begin
   set_up;  lambda:=150;

   prefix:= '/lib/wollib/padlib/';
   getfile('cornpad');
   getfile('padwire');

   getfile('outpad');            { this is a digital output pad }
   getfile('inpad');             { input pad with static resitor --
                                   use this as an analog output pad }
   getfile('inorpad');           { input pad with no resistor }
   getfile('cvddpad');           { VDD pad for chip core - your circuit }
   getfile('pvddpad');           { VDD pad for PAD frame }
   getfile('vddpad');            { VDD pad for core and PAD frame }
   getfile('cgndpad');           { GND pad for chip core - your circuit }
   getfile('pgndpad');           { GND pad for PAD frame }
   getfile('gndpad');            { GND pad for core and PAD frame }
   getfile('followpad');         { Analog follower pad }
   getfile('plnpad');
   getfile('spcpad');            { "space pad" = no pad at all }

   with my_pads do begin
      xnum:= 2;                   {  NUMBER OF PADS ON TOP/BOTTOM }
      ynum:= 6;                   {  NUMBER OF PADS ON LEFT/RIGHT }
      olap:= 10;                  {  magic number -- do not change}
      corner:= cell('cornpad');   {  also magic }

 { define pads along each side:  north and south lists are left to right }
      north[1]:= c('pvddpad');
      north[2]:= c('cgndpad');

      south[1]:= c('cvddpad');
      south[2]:= c('pgndpad');

 { east and west lists are bottom to top }
      east[1]:=  c('plnpad');
      east[2]:=  c('inorpad');
      east[3]:=  c('plnpad');
      east[4]:=  c('outpad');
      east[5]:=  c('plnpad');
      east[6]:=  c('inpad');

      west[1]:=  c('inpad');
      west[2]:=  c('plnpad');
      west[3]:=  c('outpad');
      west[4]:=  c('plnpad');
      west[5]:=  c('inorpad');
      west[6]:=  c('plnpad');
   end;

   gen_pads(my_pads, 'samplepads');   { this actually does the work,
                                        and returns a cell called 'samplepads'}

   {alternate procedure for WOLCOMP users:

   surround_with_pads('mycore', my_pads, 'newcell');

           -- creates cell 'newcell' by wrapping pads around 'mycore'

   OR

   pad_wrap ('mycore', my_pads, 'newcell', 'routing');

           -- creates cell 'newcell' by wrapping pads around 'mycore',
           PLUS reads the routing wires in file 'routing' and incorporates
           them into cell 'newcell'.  This is most useful when repeatedly
           compiling some system in which the routing remains fixed.
           After creating the routing by hand the first time (in NEWOL),
           edit by hand the CIF file, putting the routing wires into
           file 'routing'.  You can now re-compile the entire project
           without ever having to re-route those wires.

   }


shut_down;
end.


\end{verbatim}
}