@DATABASE
@NODE MAIN EMU16Cxx->17Cxx
* 16Cxx emulation HyperSource© macro file for the 17Cxx xcpu library
* © 1998 RST Ralf Steines Trier, ALL RIGHTS RESERVED
*

    w = 0  ; this gets defined, because macros
    f = 1  ; don't know CPU internal definitions

  * This gets emulated:

    @{" clrw   " link "clrw"   }
    @{" movf   " link "movf"   }
    @{" rlf    " link "rlf"    }
    @{" rrf    " link "rrf"    }

  * This fails (forbidden opcode):

    @{" tris   " link "tris"   }
    @{" option " link "option" }

  * If this macro include is not included,
  * ALL instructions named above will fail.


@ENDNODE
@NODE clrw
* clrw

  .MACRO clrw
    clrf x0A,w
  .ENDMACRO

@ENDNODE
@NODE movf
* movf

  .MACRO movf,1 ;+1
    .IF =,?1:1,1     ; ,f or ,1 (default)
       comf ?0,f     ; (xxx->xxx)
       comf ?0,f
    .ELSE            ; ,w or ,0
       movfp ?0,x0A  ; (xxx->w)
    .ENDIF
  .ENDMACRO

@ENDNODE
@NODE rlf
* rlf

  .MACRO rlf,1 ; +1
    .IF =,?1
      rlcf ?0,?1
    .ELSE
      rlcf ?0,1
    .ENDIF
  .ENDMACRO

@ENDNODE
@NODE rrf
* rrf

  .MACRO rrf,1 ; +1
    .IF =,?1
      rrcf ?0,?1
    .ELSE
      rrcf ?0,1
    .ENDIF
  .ENDMACRO

@ENDNODE
@NODE tris
* tris

  ; the TRIS instruction is
  ; not implemented any more,
  ; as promised by MicroChip®.

@ENDNODE
@NODE option
* option

  ; the OPTION instruction is
  ; not implemented any more,
  ; as promised by MicroChip®.

@ENDNODE

 .end

  .MACRO movf,1 ;+1
    .IF =,?1
      .IF =,?1,1       ; ,f or ,1
         comf ?0,f     ; (xxx->xxx)
         comf ?0,f
      .ELSE            ; ,w or ,0
         movfp ?0,x0A  ; (xxx->w)
      .ENDIF
    .ELSE              ; no arg
       comf ?0,f       ; (xxx->xxx)
       comf ?0,f
    .ENDIF
  .ENDMACRO