@DATABASE
@NODE MAIN 16C84
* 16C84 HyperSource© include file for 16C84
* © 1998 RST Ralf Steines Trier, ALL RIGHTS RESERVED
*
* source: Microchip databook 1994
*

    @{" 16C84    MEMORY       " link "16C84_MEMORY"}
    @{" 16C71/84 CPU-CORE     " link "hinc:pic/_16C7184.hinc/16C7184_CPU-CORE"}
    @{" 16C71/84 INTERRUPTS   " link "hinc:pic/_16C7184.hinc/16C7184_INTERRUPTS"}

    @{" 16C71/84 IO-PORTS     " link "hinc:pic/_16C7184.hinc/16C7184_IO-PORTS"}

    @{" 16C71/84 TIMERS       " link "hinc:pic/_16C7184.hinc/16C7184_TIMERS"}
    @{" 16C84    PROM         " link "hinc:pic/_16C7184.hinc/16C84_PROM"}

@ENDNODE
@NODE 16C84_MEMORY
****************************
*        MEMORY MAP        *
****************************

; 13 port lines, 18 pins

  REGS      = $0000    ;   24 BYTES REGS   (2 PAGES),
  REG0      = $0000    ;
  REG1      = $0000    ;

  RAM_BOT   = $000C    ;
  RAM_PBOT  = $000C    ;
  RAM_SIZE  = $0024    ;   36 BYTES RAM    (UNPAGED)
  RAM_TOP   = $0030    ;
  RAM_PAGES =     1    ;

  ROM_BOT   = $0000    ;
  ROM_SIZE  = $0400    ; 1024 WORDS ROM_14 (UNPAGED)
  ROM_TOP   = $0400    ;
  ROM_PAGES =     1    ;
  ROM_BITS  =    14    ;

  HAS_PROM  = 1        ;   ENABLE EEPROM INTERFACE

@ENDNODE

  .include hinc:pic/_16C7184.hinc