@DATABASE
@NODE MAIN 16C74
* 16C74 HyperSource© include file for 16C74
* © 1998 RST Ralf Steines Trier, ALL RIGHTS RESERVED
*
* source: Microchip databook 1994
*

    @{" 16C74    MEMORY        " link "16C74_MEMORY"}
    @{" 16C64/74 CPU-CORE      " link "hinc:pic/_16C6474.hinc/16C6474_CPU-CORE"}
    @{" 16C64/74 INTERRUPTS    " link "hinc:pic/_16C6474.hinc/16C6474_INTERRUPTS"}

    @{" 16C64/74 IO-PORTS      " link "hinc:pic/_16C6474.hinc/16C6474_IO-PORTS"}
    @{" 16C64/74 SPI-INTERFACE " link "hinc:pic/_16C6474.hinc/16C6474_SPI-INTERFACE"}
    @{" 16C74    SCI-INTERFACE " link "hinc:pic/_16C6474.hinc/16C74_SCI-INTERFACE"}
    @{" 16C74    ADCs          " link "hinc:pic/_16C6474.hinc/16C74_ADCs"}

    @{" 16C64/74 TIMERS        " link "hinc:pic/_16C6474.hinc/16C6474_TIMERS"}

@ENDNODE
@NODE 16C74_MEMORY
****************************
*        MEMORY MAP        *
****************************

; 33 port lines, 40 pins

  REGS      = $0000    ;   64 BYTES REGS   (2 PAGES),
  REG0      = $0000    ;
  REG1      = $0000    ;

  RAM_BOT   = $0020    ;
  RAM_PBOT  = $0020    ;
  RAM_SIZE  = $00C0    ;  192 BYTES RAM    (2 PAGES EACH $20-$80)
  RAM_TOP   = $0080    ;
  RAM_PAGES =     2    ;

  ROM_BOT   = $0000    ;
  ROM_SIZE  = $1000    ; 4096 WORDS ROM_14 (2 PAGES)
  ROM_TOP   = $0800    ;
  ROM_PAGES =     2    ;
  ROM_BITS  =    14    ;

  HAS_SCI   = 1        ;   ENABLE SCI INTERFACE
  HAS_ADC   = 1        ;   ENABLE ADC INTERFACE
  HAS_CCP2  = 1        ;   ENABLE CCP2 PIN

@ENDNODE

  .include hinc:PIC/_16C6474.hinc