-------------------------------------------------------------------------- CPU-Control 1.12 (18-Apr-95) -------------------------------------------------------------------------- CPU-Control is a CPU-like utility for Kickstart/WB 2.0 including a GUI. The main difference to other tools of this kind is, that CPU-Control recognizes external changes of any of its parameters. Because of this special feature it needs some CPU-Time (not much), but in iconified state it needs no processor time at all. Additionally CPU-Control allows moving VBR (VectorBaseRegister) to Fast-RAM, which significantly speeds up all Traps/Interupts. Many CLI Options have been included to allow usage in scripts, so it's a good idea to put "CPU-Control vbr nw" in your Startup- Sequence. -------------------------------------------------------------------------- Requirements -------------------------------------------------------------------------- Amiga-OS 2.04 or higher is required to run CPU-Control. -------------------------------------------------------------------------- CLI Usage -------------------------------------------------------------------------- Parameter Shortform Effect CPU needed -------------------------------------------------------------------------- (none) just starts CPU-Control ICACHE I enable Instruction Cache 68020+ NOICACHE NI disable Instruction Cache 68020+ DCACHE D enable Data Cache 68030+ NODCACHE ND disable Data Cache 68030+ IBURST IB enable Instruction Burst 68030 NOIBURST NIB disable Instruction Burst 68030 DBURST DB enable Data Burst 68030 NODBURST NDB disable Data Burst 68030 VBR move VBR to FastRAM 68010+ NOVBR normal VBR (Zero) 68010+ COPYBACK CB enable Copyback 68040 NOCOPYBACK NCB disable Copyback 68040 MMU enable FastROM/SafeKick | 68020/851 | NOMMU disable FastROM/SafeKick | or 68030 | MOVESSP SSP move SSP to FastRAM VERBOSE V Verbose output CHECK check for a specified processor (68010/68020/68030/68040/68881/68882/FPU/MMU) ICONIFY IC starts iconified NOWIN NW starts without GUI SYSTEMINFO SI displays some information about your system CCI Chip-Cache-Inhibit (see update notes) Example: CPU-Control I D IB NDB VBR SSP MMU V NW enables all Caches, enables IBurst, disables DBurst, moves VBR and SSP to FastMem, enables the MMU (FastROM or SafeKick) and prints the new status verbosely without opening the GUI. Owners of a Commodore A2x86 bridgeboard should use the following lines in their startup-sequence AFTER activating their MMU: ... PCInhibit030 BindDrivers ... This sets CacheInhibit for Janus memory areas, so that there is no need to disable the DataCache. This is not neccesary if the MMU has been enabled by CPU-Control. -------------------------------------------------------------------------- Technical Info -------------------------------------------------------------------------- CPU-Control has been developed using HiSoft's wonderful DevPac 3.14. The GUI was designed using GadToolsBox 1.3, but the code was so bad, that I decided to rewrite it. All cache manipulations are done using Exec's CacheControl, VBR movement is done by allocating 1024 Bytes of memory using AllocMem, copying the area, and then setting the VBR register to the new value. Enforcer would complain about this, but you can simply ignore it. Just for safety the routine in embedded in Forbid/Permit, and Caches are cleared via Exec's CacheClearU. The MMU option automagically selects FastROM-mode for ROM-Kickstarts and SafeKick-mode for Kickstarts loaded by ZKick/LKick/ReKick ($200000). It is NOT compatible to the WB-2.0 "CPU" command, because the MMU-Table used is much more efficient, and in addition to "CPU" it write-protects the RAM-image. Alien-MMU-Activations make the "Safe/Fast OS" gadget unavailable, and the Verbose CLI mode will show up "(MMU)", which means the MMU is active but incompatible to CPU-Control. And again: Ignore Enforcer! A BusError-Handler makes the RAM-image behave like a real ROM. 68020's without MMU (68851) and 68EC030 (68030-Light) should be recognized correctly. While the full GUI is open, CPU-Control uses a Delay/GT_GetIMsg loop to be able to recognize changes of the Cache/VBR. In iconified (zoomed) state it uses Exec's Wait without using any processor time. The MOVESSP option should only be used in Startup-Sequences, because it is a quite dangerous operation. SSP will only be moved, if there is REAL FastRAM available and SSP is currently in SlowRAM. This operation is not reversible. -------------------------------------------------------------------------- History -------------------------------------------------------------------------- 1.0 - initial release: 8-May-92 1.1 - release date: 13-May-92 - many serious bugs (hopefully) fixed - overall code optimisation - added 68020/851 and 68030 MMU support - added "ICONIFY" option 1.2 - release date: 14-May-92 - added CHECK option to test for a specified processor Example: CPU-Control check 68030 will produce an ErrorCode 5 if not found CHECK always activates the NOWIN option - cleaned-up menu layout 1.3 - release date: 16-May-92 - added MOVESSP option to allow moving the Supervisor Stackpointer to fast memory - CLI mode (especially CHECK) can now be used on 68000 - minor code cleanup 1.3a - release date: 7-Jul-92 - Cache-Inhibit for ChipRAM is no longer set automatically because every well-behaving hardware (including A3000 and A2620/30 Turboboards) does this already. In addition operation in ChipRAM is slightly faster now, because the hardwired solution effects Datacache only. In case of trouble the CCI option (CLI only!) could be used to enable Cache-Inhibit. Of course this option is only useful if used together with the MMU option. 1.4 - release date: 16-Jul-92 - implemented support for PC/AT-Bridgeboards Cache-Inhibit for Dual-Ported-RAM will be set as soon as the MMU becomes active (SafeKick or FastROM) - implemented SystemInfo (Menu or CLI-Option "SI") The short delay when measuring the MIPS performance is quite normal, so don't worry about it! - more Menu-Shortcuts available (just have a look...) - minor code cleanup 1.5 release date: 21-Jul-92 - CPU-Control is Font-Sensitive now! - replaced "CPU: ..... FPU: ....." text by "System Info" gadget 1.5a release date: 17-Sep-92 - Oh dear... Cache-Inhibit for Bridgeboards did not work! 1.6 release date: 27-Oct-92 - FastROM and SafeKick works with 68040 now (hopefully!). Address-Space is currently truncated to 64MB in order to keep translation tables short and fast. - improved MMU-switching routines 1.7 release date: 13-Mar-93 - GUI is now fully OS-3.x compatible (Menus, BusyPointer) - AA Chipset is recognized now - minor code cleanup 1.8 release date: 4-Apr-93 - 040 CopyBack switching behaves exactly like the CPU command now. - fixed MMU routines for A4000/40. active MMU (after SetPatch) will be displayed as ALIEN, inactive MMU will be displayed as PRIVATE. MMU usage is forbidden, and would be useless anyway. 1.9 release date: 25-May-93 - overall code cleanup - added MFLOPS calculation to System Info - display method for active Kickstart version is 100% clean now BTW: MIPS and MFLOPS are no absolute values, but they can be helpful to compare systems using the SAME test software. 1.10 release date: 12-Mar-95 - fixed small bug in MIPS/MFLOPS display routines - FastROM and SafeKick support for 68040 removed - removed internal ColdReboot patch, replaced by external RebootPatch program, which works perfectly with all MMUs - added external PatchExcept program to fix a serious bug in Kickstarts guru routines - includes source files for RebootPatch and PatchExcept 1.11 release date: 17-Apr-95 - some more code cleanup - included PCInhibit030 to switch CacheInhibit for C= A2x86 Bridgeboards. The MMU must be already active. This should work with MMU tables from CPU-Control, CPU (FastROM), SoftBoot (A3000) and A3000 Kickstart. Simply call this command BEFORE BindDrivers. 1.12 release date: 18-Apr-95 - improved Bridgeboard recognition, so PCInhibit030 is not needed if the MMU has been enabled by CPU-Control. ATTENTION: If the main progamm file doesn't have a length of 7976 Bytes it is DAMAGED! -------------------------------------------------------------------------- Shareware -------------------------------------------------------------------------- CPU-Control is SHAREWARE! If you use this program for a longer period than one week, please send me a donation of 10 US$ or equivalent! So if you want more tools like CPU-Control, TagScreens, UnArp and Safekick think about it and keep developers developing. THANK YOU! Registered-User-Counter: 00056 -------------------------------------------------------------------------- Author -------------------------------------------------------------------------- Send bug-reports and/or suggestions to: Martin Berndt Fr.-Alfred-Str. 115 47226 Duisburg Germany E-Mail: m_berndt@wanderer.gun.de -------------------------------------------------------------------------- (End of this wonderful document)