HOW DOES IT WORK???

(INSIDE DETAILS)

The inside activities of PPC680x0 are much more difficult to
understand, though!
Lets try to give you an idea of how it works:

PPC680x0 works with a mathematical model of an 68k CPU. 
The 68k is split up in parts, where some of them built a formula
on a complex plane. 

For example, we could take the pixels on a monitor as some points
of a complex plane. Every region of the monitor corresponds with
a region of the 68k CPU (which can be any different mode). We
could say that in the entire complex plane, all possible 
addressing modes are placed changing slightly when moving from
point to point. (For example: When moving a relatively small end
from the point corresponding with the addressing-mode d0,d4 and
in the right direction, you get d0,d5). This interpretation
method is possible because the 68k CPU is built in a very 
flexible way.

Perhaps you are wondering why we took so much time in creating a
mathematical model of the chip. Well, its quite easy to guess why
if you take a look in terms of performance. The earliest versions
of PPC680x0 were based on simple straight conversions. As a
result, in couldn't predict every combination possible, meaning
that so called trash was generated. For example, the following
mode:

        move.l  (worst.b,d2.l),d1

could be converted to something like

        addi    r28,worst
        add     r28,r28,r5     (where r3 corresponds with d0)
        lwz     r4,0(r28)

Now it seems logical that a program detects everything, but with
linear programming you cannot make sure this is done right unless
you put a special routine in your code for every single 
exception.
PPC680x0's mathematical model takes samples of the code, analyses
the samples and finally converts it to the PPC model.
The output code will be

        lwz     r4,worst(r5)

which is the most efficient way.

Besides, linear code is not as flexible as analysing code.
PPC680x0 allows the following:

move.l ([worst.q,d0*16,d4.l*2],help.b,table.w,d14.b*32,a2),(a0)+

As a matter of fact, sampling goes in an infinite way, which
means indirect addressing modes can be seen as:

        a0([b1,b2,b3,b4,b5,...],a1,a2,a3,a4,a5,...)

which means

        load    b1+b1+b2+b3+... in IOREGISTER
        load    IOREGISTER+a0+a1+a2+a3+a4+... in IOREGISTER

(and where a/b are registers.size*multi or label.size)

Every part of the 68k CPU is treated this way to optimize
output-codes.

Most conversions are done line by line, although there are
already several block-based conversions implemented.


Explanation of some terms concerning PPC680x0:

 INTEGRATING     - sampling of the source-code
 TRANSFORMING    - changing the samples to a standard form
 DIFFERENTIATING - converting the transformed samples to the
                   output source-code
 LAYERS          - the layers in which the 68k is split up
 BLOCKS          - a block of 100 lines of code for analysing
 LINE            - 1/100th of a block, one line of the input 
                   source-code
 L. AREA         - Label area (starting at first char of line)
 I. AREA         - Instruction area (starting after L. AREA)
 BWL AREA        - area that holds size (.b/.w/.l/.q/.s/.d/.x)
 T. AREA         - Type area (starting after BWL area)
 C. AREA         - Comment area (starts with ';', '*', etc.)