/* Generated automatically by the program `genemit' from the machine description file `md'. */ #include "config.h" #include "system.h" #include "rtl.h" #include "expr.h" #include "real.h" #include "flags.h" #include "output.h" #include "insn-config.h" #include "insn-flags.h" #include "insn-codes.h" #include "recog.h" #include "reload.h" extern rtx recog_operand[]; #define operands emit_operand #define FAIL return (end_sequence (), _val) #define DONE return (_val = gen_sequence (), end_sequence (), _val) rtx gen_pushdi (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, operand1); } rtx gen_tstdi (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; m68k_last_compare_had_fp_operands = 0; operand0 = operands[0]; emit (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3, gen_rtx_SET (VOIDmode, cc0_rtx, operand0), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DImode))))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_tstsi (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; m68k_last_compare_had_fp_operands = 0; operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, operand0)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_tsthi (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; m68k_last_compare_had_fp_operands = 0; operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, operand0)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_tstqi (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; m68k_last_compare_had_fp_operands = 0; operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, operand0)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_tstsf (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; { m68k_last_compare_had_fp_operands = 1; if (TARGET_FPA) { emit_insn (gen_tstsf_fpa (operands[0])); DONE; } } operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, operand0)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_tstsf_fpa (operand0) rtx operand0; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, cc0_rtx, operand0), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_tstdf (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; { m68k_last_compare_had_fp_operands = 1; if (TARGET_FPA) { emit_insn (gen_tstsf_fpa (operands[0])); DONE; } } operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, operand0)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_tstdf_fpa (operand0) rtx operand0; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, cc0_rtx, operand0), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_cmpdi (operand0, operand1) rtx operand0; rtx operand1; { rtx operand2; rtx operands[3]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; m68k_last_compare_had_fp_operands = 0; operands[2] = gen_reg_rtx (DImode); operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; emit (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, cc0_rtx, gen_rtx_COMPARE (VOIDmode, operand0, operand1)), gen_rtx_CLOBBER (VOIDmode, operand2)))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_cmpsi (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { m68k_last_compare_had_fp_operands = 0; if (flag_pic && symbolic_operand (operands[1], SImode)) { /* The source is an address which requires PIC relocation. Call legitimize_pic_address with the source, mode, and a relocation register (a new pseudo, or the final destination if reload_in_progress is set). Then fall through normally */ extern rtx legitimize_pic_address(); rtx temp = reload_in_progress ? operands[0] : gen_reg_rtx (Pmode); operands[1] = legitimize_pic_address (operands[1], SImode, temp); } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, gen_rtx_COMPARE (VOIDmode, operand0, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_cmphi (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; m68k_last_compare_had_fp_operands = 0; operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, gen_rtx_COMPARE (VOIDmode, operand0, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_cmpqi (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; m68k_last_compare_had_fp_operands = 0; operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, gen_rtx_COMPARE (VOIDmode, operand0, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_cmpdf (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { m68k_last_compare_had_fp_operands = 1; if (TARGET_FPA) { emit_insn (gen_cmpdf_fpa (operands[0], operands[1])); DONE; } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, gen_rtx_COMPARE (VOIDmode, operand0, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_cmpdf_fpa (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, cc0_rtx, gen_rtx_COMPARE (VOIDmode, operand0, operand1)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_cmpsf (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { m68k_last_compare_had_fp_operands = 1; if (TARGET_FPA) { emit_insn (gen_cmpsf_fpa (operands[0], operands[1])); DONE; } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, gen_rtx_COMPARE (VOIDmode, operand0, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_cmpsf_fpa (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, cc0_rtx, gen_rtx_COMPARE (VOIDmode, operand0, operand1)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_pushexthisi_const (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, operand1); } rtx gen_movsi_const0 (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, operand0, const0_rtx); } rtx gen_movsi (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { if (flag_pic && symbolic_operand (operands[1], SImode)) { /* The source is an address which requires PIC relocation. Call legitimize_pic_address with the source, mode, and a relocation register (a new pseudo, or the final destination if reload_in_progress is set). Then fall through normally */ extern rtx legitimize_pic_address(); rtx temp = reload_in_progress ? operands[0] : gen_reg_rtx (Pmode); operands[1] = legitimize_pic_address (operands[1], SImode, temp); } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_movhi (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, operand1); } rtx gen_movstricthi (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, gen_rtx_STRICT_LOW_PART (VOIDmode, operand0), operand1); } rtx gen_movqi (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, operand1); } rtx gen_movstrictqi (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, gen_rtx_STRICT_LOW_PART (VOIDmode, operand0), operand1); } rtx gen_movsf (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, operand1); } rtx gen_movdf (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, operand1); } rtx gen_movxf (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { if (CONSTANT_P (operands[1])) { operands[1] = force_const_mem (XFmode, operands[1]); if (! memory_address_p (XFmode, XEXP (operands[1], 0)) && ! reload_in_progress) operands[1] = change_address (operands[1], XFmode, XEXP (operands[1], 0)); } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, operand1)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_movdi (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, operand1); } rtx gen_pushasi (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, operand1); } rtx gen_truncsiqi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_TRUNCATE (QImode, operand1)); } rtx gen_trunchiqi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_TRUNCATE (QImode, operand1)); } rtx gen_truncsihi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_TRUNCATE (HImode, operand1)); } rtx gen_zero_extendqidi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ZERO_EXTEND (DImode, operand1)); } rtx gen_zero_extendhidi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ZERO_EXTEND (DImode, operand1)); } rtx gen_zero_extendsidi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ZERO_EXTEND (DImode, operand1)); } rtx gen_zero_extendhisi2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operand2; rtx operands[3]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { operands[1] = make_safe_from (operands[1], operands[0]); if (GET_CODE (operands[0]) == SUBREG) operands[2] = gen_rtx_SUBREG (HImode, SUBREG_REG (operands[0]), SUBREG_WORD (operands[0])); else operands[2] = gen_rtx_SUBREG (HImode, operands[0], 0); } operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; emit_insn (gen_rtx_SET (VOIDmode, operand0, const0_rtx)); emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_STRICT_LOW_PART (VOIDmode, operand2), operand1)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_zero_extendqihi2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operand2; rtx operands[3]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { operands[1] = make_safe_from (operands[1], operands[0]); if (GET_CODE (operands[0]) == SUBREG) operands[2] = gen_rtx_SUBREG (QImode, SUBREG_REG (operands[0]), SUBREG_WORD (operands[0])); else operands[2] = gen_rtx_SUBREG (QImode, operands[0], 0); } operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; emit_insn (gen_rtx_SET (VOIDmode, operand0, const0_rtx)); emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_STRICT_LOW_PART (VOIDmode, operand2), operand1)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_zero_extendqisi2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operand2; rtx operands[3]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { operands[1] = make_safe_from (operands[1], operands[0]); if (GET_CODE (operands[0]) == SUBREG) operands[2] = gen_rtx_SUBREG (QImode, SUBREG_REG (operands[0]), SUBREG_WORD (operands[0])); else operands[2] = gen_rtx_SUBREG (QImode, operands[0], 0); } operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; emit_insn (gen_rtx_SET (VOIDmode, operand0, const0_rtx)); emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_STRICT_LOW_PART (VOIDmode, operand2), operand1)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_extendqidi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SIGN_EXTEND (DImode, operand1)); } rtx gen_extendhidi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SIGN_EXTEND (DImode, operand1)); } rtx gen_extendsidi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SIGN_EXTEND (DImode, operand1)); } rtx gen_extendplussidi (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SIGN_EXTEND (DImode, gen_rtx_PLUS (SImode, operand1, operand2))); } rtx gen_extendhisi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SIGN_EXTEND (SImode, operand1)); } rtx gen_extendqihi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SIGN_EXTEND (HImode, operand1)); } rtx gen_extendqisi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SIGN_EXTEND (SImode, operand1)); } rtx gen_extendsfdf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT_EXTEND (DFmode, operand1)); } rtx gen_truncdfsf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT_TRUNCATE (SFmode, operand1)); } rtx gen_floatsisf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT (SFmode, operand1)); } rtx gen_floatsidf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT (DFmode, operand1)); } rtx gen_floathisf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT (SFmode, operand1)); } rtx gen_floathidf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT (DFmode, operand1)); } rtx gen_floatqisf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT (SFmode, operand1)); } rtx gen_floatqidf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT (DFmode, operand1)); } rtx gen_fix_truncdfsi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3, gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (SImode, gen_rtx_FIX (DFmode, operand1))), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_fix_truncdfhi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3, gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (HImode, gen_rtx_FIX (DFmode, operand1))), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_fix_truncdfqi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3, gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (QImode, gen_rtx_FIX (DFmode, operand1))), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_ftruncdf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (DFmode, operand1)); } rtx gen_ftruncsf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (SFmode, operand1)); } rtx gen_fixsfqi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (QImode, operand1)); } rtx gen_fixsfhi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (HImode, operand1)); } rtx gen_fixsfsi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (SImode, operand1)); } rtx gen_fixdfqi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (QImode, operand1)); } rtx gen_fixdfhi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (HImode, operand1)); } rtx gen_fixdfsi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (SImode, operand1)); } rtx gen_adddi_lshrdi_63 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (DImode, gen_rtx_LSHIFTRT (DImode, operand1, GEN_INT (63)), operand1)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_adddi_sexthishl32 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (DImode, gen_rtx_ASHIFT (DImode, gen_rtx_SIGN_EXTEND (DImode, operand1), GEN_INT (32)), operand2)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_adddi_dilshr32 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (DImode, gen_rtx_LSHIFTRT (DImode, operand1, GEN_INT (32)), operand2)); } rtx gen_adddi_dishl32 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (DImode, gen_rtx_ASHIFT (DImode, operand1, GEN_INT (32)), operand2)); } rtx gen_adddi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (DImode, operand1, operand2)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_addsi_lshrsi_31 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (SImode, gen_rtx_LSHIFTRT (SImode, operand1, GEN_INT (31)), operand1)); } rtx gen_addsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (SImode, operand1, operand2)); } rtx gen_addhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (HImode, operand1, operand2)); } rtx gen_addqi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (QImode, operand1, operand2)); } rtx gen_adddf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (DFmode, operand1, operand2)); } rtx gen_addsf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (SFmode, operand1, operand2)); } rtx gen_subdi_sexthishl32 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_MINUS (DImode, operand1, gen_rtx_ASHIFT (DImode, gen_rtx_SIGN_EXTEND (DImode, operand2), GEN_INT (32)))), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_subdi_dishl32 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MINUS (DImode, operand0, gen_rtx_ASHIFT (DImode, operand1, GEN_INT (32)))); } rtx gen_subdi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_MINUS (DImode, operand1, operand2)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_subsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MINUS (SImode, operand1, operand2)); } rtx gen_subhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MINUS (HImode, operand1, operand2)); } rtx gen_subqi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MINUS (QImode, operand1, operand2)); } rtx gen_subdf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MINUS (DFmode, operand1, operand2)); } rtx gen_subsf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MINUS (SFmode, operand1, operand2)); } rtx gen_mulhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MULT (HImode, operand1, operand2)); } rtx gen_mulhisi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MULT (SImode, gen_rtx_SIGN_EXTEND (SImode, operand1), gen_rtx_SIGN_EXTEND (SImode, operand2))); } rtx gen_mulsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MULT (SImode, operand1, operand2)); } rtx gen_umulhisi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MULT (SImode, gen_rtx_ZERO_EXTEND (SImode, operand1), gen_rtx_ZERO_EXTEND (SImode, operand2))); } rtx gen_umulsidi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, gen_rtx_SUBREG (SImode, operand0, 1), gen_rtx_MULT (SImode, operand1, operand2)), gen_rtx_SET (VOIDmode, gen_rtx_SUBREG (SImode, operand0, 0), gen_rtx_TRUNCATE (SImode, gen_rtx_LSHIFTRT (DImode, gen_rtx_MULT (DImode, gen_rtx_ZERO_EXTEND (DImode, operand1), gen_rtx_ZERO_EXTEND (DImode, operand2)), GEN_INT (32)))))); } rtx gen_mulsidi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, gen_rtx_SUBREG (SImode, operand0, 1), gen_rtx_MULT (SImode, operand1, operand2)), gen_rtx_SET (VOIDmode, gen_rtx_SUBREG (SImode, operand0, 0), gen_rtx_TRUNCATE (SImode, gen_rtx_LSHIFTRT (DImode, gen_rtx_MULT (DImode, gen_rtx_SIGN_EXTEND (DImode, operand1), gen_rtx_SIGN_EXTEND (DImode, operand2)), GEN_INT (32)))))); } rtx gen_umulsi3_highpart (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { rtx operand3; rtx operands[4]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; operands[2] = operand2; { operands[3] = gen_reg_rtx (SImode); if (GET_CODE (operands[2]) == CONST_INT || GET_CODE (operands[2]) == CONST_DOUBLE) { if (! const_uint32_operand (operands[2], VOIDmode)) abort (); /* We have to adjust the operand order for the matching constraints. */ emit_insn (gen_const_umulsi3_highpart (operands[0], operands[3], operands[1], operands[2])); DONE; } } operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; operand3 = operands[3]; emit (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_TRUNCATE (SImode, gen_rtx_LSHIFTRT (DImode, gen_rtx_MULT (DImode, gen_rtx_ZERO_EXTEND (DImode, operand1), gen_rtx_ZERO_EXTEND (DImode, operand2)), GEN_INT (32)))), gen_rtx_CLOBBER (VOIDmode, operand3)))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_const_umulsi3_highpart (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_TRUNCATE (SImode, gen_rtx_LSHIFTRT (DImode, gen_rtx_MULT (DImode, gen_rtx_ZERO_EXTEND (DImode, operand2), operand3), GEN_INT (32)))), gen_rtx_CLOBBER (VOIDmode, operand1))); } rtx gen_smulsi3_highpart (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { rtx operand3; rtx operands[4]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; operands[2] = operand2; { operands[3] = gen_reg_rtx (SImode); if (GET_CODE (operands[2]) == CONST_INT || GET_CODE (operands[2]) == CONST_DOUBLE) { if (! const_sint32_operand (operands[2], VOIDmode)) abort (); /* We have to adjust the operand order for the matching constraints. */ emit_insn (gen_const_smulsi3_highpart (operands[0], operands[3], operands[1], operands[2])); DONE; } } operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; operand3 = operands[3]; emit (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_TRUNCATE (SImode, gen_rtx_LSHIFTRT (DImode, gen_rtx_MULT (DImode, gen_rtx_SIGN_EXTEND (DImode, operand1), gen_rtx_SIGN_EXTEND (DImode, operand2)), GEN_INT (32)))), gen_rtx_CLOBBER (VOIDmode, operand3)))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_const_smulsi3_highpart (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_TRUNCATE (SImode, gen_rtx_LSHIFTRT (DImode, gen_rtx_MULT (DImode, gen_rtx_SIGN_EXTEND (DImode, operand2), operand3), GEN_INT (32)))), gen_rtx_CLOBBER (VOIDmode, operand1))); } rtx gen_muldf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MULT (DFmode, operand1, operand2)); } rtx gen_mulsf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MULT (SFmode, operand1, operand2)); } rtx gen_divdf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_DIV (DFmode, operand1, operand2)); } rtx gen_divsf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_DIV (SFmode, operand1, operand2)); } rtx gen_divmodsi4 (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_DIV (SImode, operand1, operand2)), gen_rtx_SET (VOIDmode, operand3, gen_rtx_MOD (SImode, operand1, operand2)))); } rtx gen_udivmodsi4 (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_UDIV (SImode, operand1, operand2)), gen_rtx_SET (VOIDmode, operand3, gen_rtx_UMOD (SImode, operand1, operand2)))); } rtx gen_divmodhi4 (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_DIV (HImode, operand1, operand2)), gen_rtx_SET (VOIDmode, operand3, gen_rtx_MOD (HImode, operand1, operand2)))); } rtx gen_udivmodhi4 (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_UDIV (HImode, operand1, operand2)), gen_rtx_SET (VOIDmode, operand3, gen_rtx_UMOD (HImode, operand1, operand2)))); } rtx gen_anddi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_AND (DImode, operand1, operand2)); } rtx gen_andsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_AND (SImode, operand1, operand2)); } rtx gen_andsi3_internal (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_AND (SImode, operand1, operand2)); } rtx gen_andsi3_5200 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_AND (SImode, operand1, operand2)); } rtx gen_andhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_AND (HImode, operand1, operand2)); } rtx gen_andqi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_AND (QImode, operand1, operand2)); } rtx gen_iordi_zext (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_IOR (DImode, gen_rtx_ZERO_EXTEND (DImode, operand1), operand2)); } rtx gen_iordi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_IOR (DImode, operand1, operand2)); } rtx gen_iorsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_IOR (SImode, operand1, operand2)); } rtx gen_iorsi3_internal (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_IOR (SImode, operand1, operand2)); } rtx gen_iorsi3_5200 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_IOR (SImode, operand1, operand2)); } rtx gen_iorhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_IOR (HImode, operand1, operand2)); } rtx gen_iorqi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_IOR (QImode, operand1, operand2)); } rtx gen_iorsi_zexthi_ashl16 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_IOR (SImode, gen_rtx_ZERO_EXTEND (SImode, operand1), gen_rtx_ASHIFT (SImode, operand2, GEN_INT (16)))); } rtx gen_iorsi_zext (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_IOR (SImode, gen_rtx_ZERO_EXTEND (SImode, operand1), operand2)); } rtx gen_xordi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_XOR (DImode, operand1, operand2)); } rtx gen_xorsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_XOR (SImode, operand1, operand2)); } rtx gen_xorsi3_internal (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_XOR (SImode, operand1, operand2)); } rtx gen_xorsi3_5200 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_XOR (SImode, operand1, operand2)); } rtx gen_xorhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_XOR (HImode, operand1, operand2)); } rtx gen_xorqi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_XOR (QImode, operand1, operand2)); } rtx gen_negdi2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { if (TARGET_5200) emit_insn (gen_negdi2_5200 (operands[0], operands[1])); else emit_insn (gen_negdi2_internal (operands[0], operands[1])); DONE; } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (DImode, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_negdi2_internal (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (DImode, operand1)); } rtx gen_negdi2_5200 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (DImode, operand1)); } rtx gen_negsi2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { if (TARGET_5200) emit_insn (gen_negsi2_5200 (operands[0], operands[1])); else emit_insn (gen_negsi2_internal (operands[0], operands[1])); DONE; } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (SImode, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_negsi2_internal (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (SImode, operand1)); } rtx gen_negsi2_5200 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (SImode, operand1)); } rtx gen_neghi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (HImode, operand1)); } rtx gen_negqi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (QImode, operand1)); } rtx gen_negsf2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { if (!TARGET_FPA && !TARGET_68881) { rtx result; rtx target; target = operand_subword_force (operands[0], 0, SFmode); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, SFmode), GEN_INT(0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); if (result != target) emit_move_insn (result, target); /* Make a place for REG_EQUAL. */ emit_move_insn (operands[0], operands[0]); DONE; } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (SFmode, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_negdf2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { if (!TARGET_FPA && !TARGET_68881) { rtx result; rtx target; rtx insns; start_sequence (); target = operand_subword (operands[0], 0, 1, DFmode); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, DFmode), GEN_INT(0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); if (result != target) emit_move_insn (result, target); emit_move_insn (operand_subword (operands[0], 1, 1, DFmode), operand_subword_force (operands[1], 1, DFmode)); insns = get_insns (); end_sequence (); emit_no_conflict_block (insns, operands[0], operands[1], 0, 0); DONE; } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (DFmode, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_sqrtsf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SQRT (SFmode, operand1)); } rtx gen_sqrtdf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SQRT (DFmode, operand1)); } rtx gen_abssf2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { if (!TARGET_FPA && !TARGET_68881) { rtx result; rtx target; target = operand_subword_force (operands[0], 0, SFmode); result = expand_binop (SImode, and_optab, operand_subword_force (operands[1], 0, SFmode), GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN); if (result == 0) abort (); if (result != target) emit_move_insn (result, target); /* Make a place for REG_EQUAL. */ emit_move_insn (operands[0], operands[0]); DONE; } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_ABS (SFmode, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_absdf2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { if (!TARGET_FPA && !TARGET_68881) { rtx result; rtx target; rtx insns; start_sequence (); target = operand_subword (operands[0], 0, 1, DFmode); result = expand_binop (SImode, and_optab, operand_subword_force (operands[1], 0, DFmode), GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN); if (result == 0) abort (); if (result != target) emit_move_insn (result, target); emit_move_insn (operand_subword (operands[0], 1, 1, DFmode), operand_subword_force (operands[1], 1, DFmode)); insns = get_insns (); end_sequence (); emit_no_conflict_block (insns, operands[0], operands[1], 0, 0); DONE; } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_ABS (DFmode, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_one_cmpldi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NOT (DImode, operand1)); } rtx gen_one_cmplsi2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { if (TARGET_5200) emit_insn (gen_one_cmplsi2_5200 (operands[0], operands[1])); else emit_insn (gen_one_cmplsi2_internal (operands[0], operands[1])); DONE; } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_NOT (SImode, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_one_cmplsi2_internal (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NOT (SImode, operand1)); } rtx gen_one_cmplsi2_5200 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NOT (SImode, operand1)); } rtx gen_one_cmplhi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NOT (HImode, operand1)); } rtx gen_one_cmplqi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NOT (QImode, operand1)); } rtx gen_ashldi_extsi (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFT (DImode, gen_rtx (GET_CODE (operand2), DImode, operand1), GEN_INT (32))); } rtx gen_ashldi_sexthi (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFT (DImode, gen_rtx_SIGN_EXTEND (DImode, operand1), GEN_INT (32))), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_ashldi_const32 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFT (DImode, operand1, GEN_INT (32))); } rtx gen_ashldi_const (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFT (DImode, operand1, operand2)); } rtx gen_ashldi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { rtx operands[3]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; operands[2] = operand2; { /* ??? This is a named pattern like this is not allowed to FAIL based on its operands. */ if (GET_CODE (operands[2]) != CONST_INT || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3) && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16 && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63))) FAIL; } operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFT (DImode, operand1, operand2))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_ashlsi_16 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFT (SImode, operand1, GEN_INT (16))); } rtx gen_ashlsi_17_24 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFT (SImode, operand1, operand2)); } rtx gen_ashlsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFT (SImode, operand1, operand2)); } rtx gen_ashlhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFT (HImode, operand1, operand2)); } rtx gen_ashlqi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFT (QImode, operand1, operand2)); } rtx gen_ashrsi_16 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFTRT (SImode, operand1, GEN_INT (16))); } rtx gen_subreghi1ashrdi_const32 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SUBREG (HImode, gen_rtx_ASHIFTRT (DImode, operand1, GEN_INT (32)), 1)); } rtx gen_subregsi1ashrdi_const32 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SUBREG (SImode, gen_rtx_ASHIFTRT (DImode, operand1, GEN_INT (32)), 1)); } rtx gen_ashrdi_const32 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFTRT (DImode, operand1, GEN_INT (32))); } rtx gen_ashrdi_const32_mem (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFTRT (DImode, operand1, GEN_INT (32))), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_ashrdi_const (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFTRT (DImode, operand1, operand2)); } rtx gen_ashrdi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { rtx operands[3]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; operands[2] = operand2; { /* ??? This is a named pattern like this is not allowed to FAIL based on its operands. */ if (GET_CODE (operands[2]) != CONST_INT || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3) && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16 && (INTVAL (operands[2]) < 31 || INTVAL (operands[2]) > 63))) FAIL; } operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFTRT (DImode, operand1, operand2))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_ashrsi_31 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFTRT (SImode, operand1, GEN_INT (31))); } rtx gen_ashrsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFTRT (SImode, operand1, operand2)); } rtx gen_ashrhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFTRT (HImode, operand1, operand2)); } rtx gen_ashrqi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ASHIFTRT (QImode, operand1, operand2)); } rtx gen_subreg1lshrdi_const32 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SUBREG (SImode, gen_rtx_LSHIFTRT (DImode, operand1, GEN_INT (32)), 1)); } rtx gen_lshrdi_const32 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_LSHIFTRT (DImode, operand1, GEN_INT (32))); } rtx gen_lshrdi_const (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_LSHIFTRT (DImode, operand1, operand2)); } rtx gen_lshrdi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { rtx operands[3]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; operands[2] = operand2; { /* ??? This is a named pattern like this is not allowed to FAIL based on its operands. */ if (GET_CODE (operands[2]) != CONST_INT || ((INTVAL (operands[2]) < 1 || INTVAL (operands[2]) > 3) && INTVAL (operands[2]) != 8 && INTVAL (operands[2]) != 16 && (INTVAL (operands[2]) < 32 || INTVAL (operands[2]) > 63))) FAIL; } operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_LSHIFTRT (DImode, operand1, operand2))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_lshrsi_31 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_LSHIFTRT (SImode, operand1, GEN_INT (31))); } rtx gen_lshrsi_16 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_LSHIFTRT (SImode, operand1, GEN_INT (16))); } rtx gen_lshrsi_17_24 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_LSHIFTRT (SImode, operand1, operand2)); } rtx gen_lshrsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_LSHIFTRT (SImode, operand1, operand2)); } rtx gen_lshrhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_LSHIFTRT (HImode, operand1, operand2)); } rtx gen_lshrqi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_LSHIFTRT (QImode, operand1, operand2)); } rtx gen_rotlsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ROTATE (SImode, operand1, operand2)); } rtx gen_rotlhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ROTATE (HImode, operand1, operand2)); } rtx gen_rotlqi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ROTATE (QImode, operand1, operand2)); } rtx gen_rotrsi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ROTATERT (SImode, operand1, operand2)); } rtx gen_rotrhi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ROTATERT (HImode, operand1, operand2)); } rtx gen_rotrqi3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ROTATERT (QImode, operand1, operand2)); } rtx gen_bsetmemqi (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_IOR (QImode, gen_rtx_SUBREG (QImode, gen_rtx_ASHIFT (SImode, const1_rtx, operand1), 0), operand0)); } rtx gen_bclrmemqi (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, gen_rtx_ZERO_EXTRACT (SImode, operand0, const1_rtx, gen_rtx_MINUS (SImode, GEN_INT (7), operand1)), const0_rtx); } rtx gen_extv (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SIGN_EXTRACT (SImode, operand1, operand2, operand3)); } rtx gen_extzv (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ZERO_EXTRACT (SImode, operand1, operand2, operand3)); } rtx gen_insv (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_SET (VOIDmode, gen_rtx_ZERO_EXTRACT (SImode, operand0, operand1, operand2), operand3); } rtx gen_scc0_di (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx (GET_CODE (operand1), VOIDmode, operand2, const0_rtx)); } rtx gen_scc0_di_5200 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx (GET_CODE (operand1), VOIDmode, operand2, const0_rtx)); } rtx gen_scc_di (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx (GET_CODE (operand1), VOIDmode, operand2, operand3)); } rtx gen_scc_di_5200 (operand0, operand1, operand2, operand3) rtx operand0; rtx operand1; rtx operand2; rtx operand3; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx (GET_CODE (operand1), VOIDmode, operand2, operand3)); } rtx gen_seq (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; { if (TARGET_68060 && m68k_last_compare_had_fp_operands) { m68k_last_compare_had_fp_operands = 0; FAIL; } } operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_EQ (QImode, cc0_rtx, const0_rtx))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_sne (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; { if (TARGET_68060 && m68k_last_compare_had_fp_operands) { m68k_last_compare_had_fp_operands = 0; FAIL; } } operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_NE (QImode, cc0_rtx, const0_rtx))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_sgt (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; { if (TARGET_68060 && m68k_last_compare_had_fp_operands) { m68k_last_compare_had_fp_operands = 0; FAIL; } } operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_GT (QImode, cc0_rtx, const0_rtx))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_sgtu (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_GTU (QImode, cc0_rtx, const0_rtx)); } rtx gen_slt (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; { if (TARGET_68060 && m68k_last_compare_had_fp_operands) { m68k_last_compare_had_fp_operands = 0; FAIL; } } operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_LT (QImode, cc0_rtx, const0_rtx))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_sltu (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_LTU (QImode, cc0_rtx, const0_rtx)); } rtx gen_sge (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; { if (TARGET_68060 && m68k_last_compare_had_fp_operands) { m68k_last_compare_had_fp_operands = 0; FAIL; } } operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_GE (QImode, cc0_rtx, const0_rtx))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_sgeu (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_GEU (QImode, cc0_rtx, const0_rtx)); } rtx gen_sle (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; { if (TARGET_68060 && m68k_last_compare_had_fp_operands) { m68k_last_compare_had_fp_operands = 0; FAIL; } } operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_LE (QImode, cc0_rtx, const0_rtx))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_sleu (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_LEU (QImode, cc0_rtx, const0_rtx)); } rtx gen_beq0_di (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_EQ (VOIDmode, operand0, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand1), pc_rtx)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_bne0_di (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_NE (VOIDmode, operand0, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand1), pc_rtx)), gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)))); } rtx gen_bge0_di (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_GE (VOIDmode, operand0, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand1), pc_rtx)); } rtx gen_blt0_di (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_LT (VOIDmode, operand0, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand1), pc_rtx)); } rtx gen_beq (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_EQ (VOIDmode, cc0_rtx, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand0), pc_rtx)); } rtx gen_bne (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_NE (VOIDmode, cc0_rtx, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand0), pc_rtx)); } rtx gen_bgt (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_GT (VOIDmode, cc0_rtx, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand0), pc_rtx)); } rtx gen_bgtu (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_GTU (VOIDmode, cc0_rtx, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand0), pc_rtx)); } rtx gen_blt (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_LT (VOIDmode, cc0_rtx, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand0), pc_rtx)); } rtx gen_bltu (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_LTU (VOIDmode, cc0_rtx, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand0), pc_rtx)); } rtx gen_bge (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_GE (VOIDmode, cc0_rtx, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand0), pc_rtx)); } rtx gen_bgeu (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_GEU (VOIDmode, cc0_rtx, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand0), pc_rtx)); } rtx gen_ble (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_LE (VOIDmode, cc0_rtx, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand0), pc_rtx)); } rtx gen_bleu (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_LEU (VOIDmode, cc0_rtx, const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand0), pc_rtx)); } rtx gen_jump (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_LABEL_REF (VOIDmode, operand0)); } rtx gen_tablejump (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { #ifdef CASE_VECTOR_PC_RELATIVE operands[0] = gen_rtx_PLUS (SImode, pc_rtx, gen_rtx_SIGN_EXTEND (SImode, operands[0])); #endif } operand0 = operands[0]; operand1 = operands[1]; emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, pc_rtx, operand0), gen_rtx_USE (VOIDmode, gen_rtx_LABEL_REF (VOIDmode, operand1))))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_decrement_and_branch_until_zero (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, gen_rtx_SET (VOIDmode, pc_rtx, gen_rtx_IF_THEN_ELSE (VOIDmode, gen_rtx_GE (VOIDmode, gen_rtx_PLUS (SImode, operand0, constm1_rtx), const0_rtx), gen_rtx_LABEL_REF (VOIDmode, operand1), pc_rtx)), gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (SImode, operand0, constm1_rtx)))); } rtx gen_call (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { if (flag_pic && GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF) SYMBOL_REF_FLAG (XEXP (operands[0], 0)) = 1; } operand0 = operands[0]; operand1 = operands[1]; emit_call_insn (gen_rtx_CALL (VOIDmode, operand0, operand1)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_call_value (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { rtx operands[3]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; operands[2] = operand2; { if (flag_pic && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF) SYMBOL_REF_FLAG (XEXP (operands[1], 0)) = 1; } operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; emit_call_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_CALL (VOIDmode, operand1, operand2))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_untyped_call (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { rtx operands[3]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; operands[2] = operand2; { int i; emit_call_insn (gen_call (operands[0], const0_rtx, NULL, const0_rtx)); for (i = 0; i < XVECLEN (operands[2], 0); i++) { rtx set = XVECEXP (operands[2], 0, i); emit_move_insn (SET_DEST (set), SET_SRC (set)); } /* The optimizer does not know that the call sets the function value registers we stored in the result block. We avoid problems by claiming that all hard registers are used and clobbered at this point. */ emit_insn (gen_blockage ()); DONE; } operand0 = operands[0]; operand1 = operands[1]; operand2 = operands[2]; emit_call_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (3, gen_rtx_CALL (VOIDmode, operand0, const0_rtx), operand1, operand2))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_blockage () { return gen_rtx_UNSPEC_VOLATILE (VOIDmode, gen_rtvec (1, const0_rtx), 0); } rtx gen_nop () { return const0_rtx; } rtx gen_probe () { return gen_rtx_REG (SImode, 15); } rtx gen_return () { return gen_rtx_RETURN (VOIDmode); } rtx gen_indirect_jump (operand0) rtx operand0; { return gen_rtx_SET (VOIDmode, pc_rtx, operand0); } rtx gen_tstxf (operand0) rtx operand0; { rtx operands[1]; rtx _val = 0; start_sequence (); operands[0] = operand0; m68k_last_compare_had_fp_operands = 1; operand0 = operands[0]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, operand0)); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_cmpxf (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; m68k_last_compare_had_fp_operands = 1; operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, cc0_rtx, gen_rtx_COMPARE (VOIDmode, operand0, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_extendsfxf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT_EXTEND (XFmode, operand1)); } rtx gen_extenddfxf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT_EXTEND (XFmode, operand1)); } rtx gen_truncxfdf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT_TRUNCATE (DFmode, operand1)); } rtx gen_truncxfsf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT_TRUNCATE (SFmode, operand1)); } rtx gen_floatsixf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT (XFmode, operand1)); } rtx gen_floathixf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT (XFmode, operand1)); } rtx gen_floatqixf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FLOAT (XFmode, operand1)); } rtx gen_ftruncxf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (XFmode, operand1)); } rtx gen_fixxfqi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (QImode, operand1)); } rtx gen_fixxfhi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (HImode, operand1)); } rtx gen_fixxfsi2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_FIX (SImode, operand1)); } rtx gen_addxf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_PLUS (XFmode, operand1, operand2)); } rtx gen_subxf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MINUS (XFmode, operand1, operand2)); } rtx gen_mulxf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_MULT (XFmode, operand1, operand2)); } rtx gen_divxf3 (operand0, operand1, operand2) rtx operand0; rtx operand1; rtx operand2; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_DIV (XFmode, operand1, operand2)); } rtx gen_negxf2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { /* ??? There isn't an FPA define_insn so we could handle it here too. For now we don't (paranoia). */ if (!TARGET_68881) { rtx result; rtx target; rtx insns; start_sequence (); target = operand_subword (operands[0], 0, 1, XFmode); result = expand_binop (SImode, xor_optab, operand_subword_force (operands[1], 0, XFmode), GEN_INT(0x80000000), target, 0, OPTAB_WIDEN); if (result == 0) abort (); if (result != target) emit_move_insn (result, target); emit_move_insn (operand_subword (operands[0], 1, 1, XFmode), operand_subword_force (operands[1], 1, XFmode)); emit_move_insn (operand_subword (operands[0], 2, 1, XFmode), operand_subword_force (operands[1], 2, XFmode)); insns = get_insns (); end_sequence (); emit_no_conflict_block (insns, operands[0], operands[1], 0, 0); DONE; } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (XFmode, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_negxf2_68881 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_NEG (XFmode, operand1)); } rtx gen_absxf2 (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { /* ??? There isn't an FPA define_insn so we could handle it here too. For now we don't (paranoia). */ if (!TARGET_68881) { rtx result; rtx target; rtx insns; start_sequence (); target = operand_subword (operands[0], 0, 1, XFmode); result = expand_binop (SImode, and_optab, operand_subword_force (operands[1], 0, XFmode), GEN_INT(0x7fffffff), target, 0, OPTAB_WIDEN); if (result == 0) abort (); if (result != target) emit_move_insn (result, target); emit_move_insn (operand_subword (operands[0], 1, 1, XFmode), operand_subword_force (operands[1], 1, XFmode)); emit_move_insn (operand_subword (operands[0], 2, 1, XFmode), operand_subword_force (operands[1], 2, XFmode)); insns = get_insns (); end_sequence (); emit_no_conflict_block (insns, operands[0], operands[1], 0, 0); DONE; } } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_ABS (XFmode, operand1))); _val = gen_sequence (); end_sequence (); return _val; } rtx gen_absxf2_68881 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_ABS (XFmode, operand1)); } rtx gen_sqrtxf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_SQRT (XFmode, operand1)); } rtx gen_sinsf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_UNSPEC (SFmode, gen_rtvec (1, operand1), 1)); } rtx gen_sindf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_UNSPEC (DFmode, gen_rtvec (1, operand1), 1)); } rtx gen_sinxf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_UNSPEC (XFmode, gen_rtvec (1, operand1), 1)); } rtx gen_cossf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_UNSPEC (SFmode, gen_rtvec (1, operand1), 2)); } rtx gen_cosdf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_UNSPEC (DFmode, gen_rtvec (1, operand1), 2)); } rtx gen_cosxf2 (operand0, operand1) rtx operand0; rtx operand1; { return gen_rtx_SET (VOIDmode, operand0, gen_rtx_UNSPEC (XFmode, gen_rtvec (1, operand1), 2)); } rtx gen_allocate_stack (operand0, operand1) rtx operand0; rtx operand1; { rtx operands[2]; rtx _val = 0; start_sequence (); operands[0] = operand0; operands[1] = operand1; { #ifdef ALTERNATE_ALLOCATE_STACK ALTERNATE_ALLOCATE_STACK(operands); #endif } operand0 = operands[0]; operand1 = operands[1]; emit_insn (gen_rtx_SET (VOIDmode, operand0, gen_rtx_MINUS (SImode, gen_rtx_REG (SImode, 15), operand1))); emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, 15), gen_rtx_MINUS (SImode, gen_rtx_REG (SImode, 15), operand1))); _val = gen_sequence (); end_sequence (); return _val; } void add_clobbers (pattern, insn_code_number) rtx pattern; int insn_code_number; { switch (insn_code_number) { case 108: case 107: case 106: XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)); XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)); break; case 380: case 379: case 298: case 282: case 149: case 147: case 123: case 120: case 119: case 29: case 26: case 14: case 11: XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)); break; case 3: XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode)); XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (DImode)); break; default: abort (); } }