@TEMPLATE
@N=200
@@@@@@@|@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@
 ------------------ 68000 Instructions --------------------
 Mnem
 Notes
 Modes
 Sizes
 XNZVC
@ENDTEMPLATE

@
ABCD - Add BCD src,dest with extend
src10 + dest10 + X -> dest10
Dy,Dx    -(Ay),-(Ax)
8        8
*U*U*    *U*U*

@
ADD - Add binary src,dest
src + dest -> dest
<ea>,Dn   Dn,<ea>
8,16,32   8,16,32
*****     *****

@
ADDA - Add binary src to address register  src,dest
src + dest -> dest  (all 32 bits of dest affected)
<ea>,An
16,32
-----

@
ADDI - Add immediate constant  #d,dest
#d + dest -> dest
#d,<ea>
8,16,32
*****

@
ADDQ - Add 3-bit immediate constant  #d3,dest
#d3 + dest -> dest
#d3,<ea>
8,16,32
*****

@
ADDX - Add extended  src,dest
src + dest + X -> dest
Dx,Dy    -(Ax),-(Ay)
8,16,32  8,16,32
*****    *****

@
AND - Bitwise AND  src,dest
src AND dest -> dest
<ea>,Dn  Dn,<ea>
8,16,32  8,16,32
*****    *****

@
ANDI - Bitwise AND with immediate  #d,dest
#d AND dest -> dest
#d,<ea>
8,16,32
-**00

@
ANDI SR - ANDI to SR (Priviledged)
if(S=1) src AND SR -> SR;  ELSE TRAP
#d,SR (priv)
8,16
*****

@
ASL - Arithmetic shift left  count,dest
dest 0 << count -> dest,C; sets V if sign change
Dx,Dy    #d,Dn    <ea>
8,16,32  8,16,32  16
*****    *****    *****

@
ASR - Arithmetic shift right  count,dest
sign dest >> count -> dest,C,X
Dx,Dy    #d,Dn    <ea>
8,16,32  8,16,32  16
*****    *****    *****

@
Bcc <label> - Branch on condition code
Bcc[.S/.W] <label>: if cc then PC + disp -> PC
Bcc.S    Bcc.W    Bcc
8        16       32
-----    -----    -----

@
BCHG - Test and invert a single bit  bit,dest
~dest[bit] -> dest[bit], Z
Dn,<ea>  #d,<ea>
8,32     8,32
--*--    --*--

@
BCLR - Test and clear a single bit  bit,dest
0 -> dest[bit], ~dest[bit] -> Z
Dn,<ea>  #d,<ea>
8,32     8,32
--*--    --*--

@
BRA <label> - Branch always
PC + disp -> PC
BRA.S    BRA.W    BRA
8        16       32
-----    -----    -----

@
BSET - Test and set a single bit  bit,dest
1 -> dest[bit], ~dest[bit] -> Z
Dn,<ea>  #d,<ea>
8,32     8,32
--*--    --*--

@
BSR <label> - Branch relative to subroutine
PC -> -(SP); PC + disp -> PC
BSR.S    BSR.W    BSR
8        16       32
-----    -----    -----

@
BTST - Test a single bit  bit,dest
~dest[bit] -> Z  (bit mod 8 if memory dest)
Dn,<ea>  #d,<ea>
8,32     8,32    <- 8 for memory <ea>, 32 for reg
--*--    --*--

@
CHK - Check register against bounds
if Dn<0 or Dn>dest then TRAP
<ea>,Dn
16
--*--  (Cause CHK exeption)

@
CLR - Sets operand to 0
0 -> dest  (can't CLR an A register)
<ea>
8,16,32
-0100

@
CMP - Compare  src,dest
dest - src; set CCR
<ea>,Dn
8,16,32
-****

@
CMPA - Compare address  src,dest
dest - src; set CCR
<ea>,An
16,32
-****

@
CMPI - Compare immediate  #d,dest
dest - #d; set CCR
#d,<ea>
8,16,32
-****

@
CMPM - Compare memory with post-inc  src,dest
dest - src; set CCR
(Ay)+,(Ax)+
8,16,32
-*****

@
DBcc - Decrement Bcc
if cc false, Dn-1->Dn; if Dn<>-1, PC+disp->PC
Dn,<label>
16
-----

@
DIVS - Divide signed  src16,dest32
dest32 / src16 -> dest[rem16][quot16]
<ea>,Dn
16
-***0 (by 0 TRAP; V set if quotnt > 16 bit)

@
DIVU - Divide unsigned  src16,dest32
dest32 / src16 -> dest[rem16][quot16]
<ea>,Dn
16
-***0 (by 0 TRAP; V set if quotnt > 16 bit)

@
EOR - Exclusive OR  src,dest
src EOR dest -> dest
Dn,<ea>
8,16,32
-**00

@
EORI - Exclusive OR immediate  #d,dest
#d EOR dest -> dest
#d,<ea>
8,16,32
-**00

@
EORI SR - EORI to SR (Priviledged)
if(S=1) data EOR SR -> SR; ELSE TRAP
#d,SR (priviledged)
16,32
*****

@
EXG - Exchange contents of 2 registers
Rx <-> Ry
Rx,Ry
32
-----

@
EXT - Sign Extend
extend sign bit of byte->word or word->long
Dn
16,32
-**00

@
ILLEGAL - an illegal instruction
PC-> -(SSP); SR-> -(SSP); Except.Vec#4->PC
none
none
-----

@
JMP - Transfer control to dest
<ea> -> PC
<ea>
unsized
-----

@
JSR - Calls subroutine at dest
PC -> -(SP); <ea> -> PC
<ea>
unsized
-----

@
LEA - Load effective address into An
<ea> -> An
<ea>,An
32
-----

@
LINK - Allocates a stack frame
An -> -(SP); SP -> An; SP + d16 -> SP
An,#d
unsized
-----

@
LSL - Logical shift left  count,dest
dest 0 << count -> dest,C,X
Dx,Dy    #d,Dn    <ea>
8,16,32  8,16,32  16
***0*    ***0*    ***0*

@
LSR - Logical shift right  count,dest
0 dest >> count -> dest,C,X
Dx,Dy     #d,Dn     <ea>
8,16,32   8,16,32   16
***0*     ***0*     ***0*

@
MOVE - Move to memory or Dn  src,dest
src -> dest
<ea>,<ea>  <ea>,CCR
8,16,32    16
-**00      *****

@
MOVE SR - Move to/from SR (Priv. on 68020)
if(S=1) SR->dest or dest->SR;  ELSE TRAP
SR,<ea>   <ea>,SR
16        16
-----     *****

@
MOVE USP - Move to/from USP (Priviledged)
if(S=1) USP->dest or dest->USP;  ELSE TRAP
USP,An    An,USP
32        32
-----     -----

@
MOVEA - Move to address register  src,An
src -> An
<ea>,An
16,32
-----

@
MOVEM - Move multiple regs <> memory
list -> dest  (example list:  d0-d2/a1/a3-a6)
<list>,<ea> or -(An)    <ea> or (An)+,<list>
16,32                   16,32
-----                   -----

@
MOVEP - Move 8-bit peripheral data
Move periph. reg <> alternate mem. bytes
Dx,d(Ay)  d(Ay),Dx
16,32     16,32
-----     -----

@
MOVEQ - Move 8-bit signed immediate  #d8,dest
#d8 -> dest (d = -128 to 127)
#d8,Dn
32
-**00

@
MULS - Multiply signed  src16,dest16
src16 * dest16 -> dest32
<ea>,Dn
16
-**00

@
MULU - Multiply unsigned  src16,dest16
src16 * dest16 -> dest32
<ea>,Dn
16
-**00

@
NBCD - Negate BCD  dest10
0 - dest10 - X -> dest10
<ea>
8
*U*U*

@
NEG - Negate (2's comp)
0 - dest -> dest
<ea>
8,16,32
*****

@
NEGX - Negate with extend (2's comp)
0 - dest - X -> dest
<ea>
8,16,32
*****

@
NOP - No operation
PC + 2 -> PC
none
none
-----

@
NOT - Flip all bits (1's comp)
~dest -> dest
<ea>
8,16,32
-**00

@
OR - Bitwise inclusive binary OR  src,dest
src OR dest -> dest
<ea>,Dn   Dn,<ea>
8,16,32   8,16,32
-**00     -**00

@
ORI - Bitwise inclusive binary immediate OR
#d OR dest -> dest
#d,<ea>
8,16,32
-**00

@
OR - ORI to SR (Priviledged)
if(S=1) data OR SR -> SR; ELSE TRAP
#d,SR
8,16,32
*****

@
PEA - Push effective address
<ea> -> -(SP)
<ea>
32
-----

@
RESET - Reset all devices (Priviledged)
if S = 1 then assert Reset line
none
none
-----

@
ROL - Rotate left  count,dest
dest << count, left dest bit into right and C
Dx,Dy     #d,Dn     <ea>
8,16,32   8,16,32   16
-**0*     -**0*     -**0*

@
ROR - Rotate right  count,dest
dest >> count, right dest bit into left and C
Dx,Dy     #d,Dn     <ea>
8,16,32   8,16,32   16
-**0*     -**0*     -**0*

@
ROXL - Rotate left with extend  count,dest
dest << count, X to right bit, left bit to X,C
Dx,Dy     #d,Dn     <ea>
8,16,32   8,16,32   16
***0*     ***0*     ***0*

@
ROXR - Rotate right with extend  count,dest
dest << count, X to left bit, right bit to X,C
Dx,Dy     #d,Dn     <ea>
8,16,32   8,16,32   16
***0*     ***0*     ***0*

@
RTE - Return from Exception  (Priviledged)
if(S=1) (SP)+ -> SR, (SP)+ -> PC; ELSE TRAP
none (Note - 68010 has a variation on this)
none
*****

@
RTR - Return and Restore
(SP)+ -> CCR; (SP)+ -> PC
none
none
*****

@
RTS - Return from subroutine
(SP)+ -> PC
none
none
-----

@
SBCD - Subtract BCD with extend  src10,dest10
src10 - dest10 - X -> dest10
Dy,Dx    -(Ay),-(Ax)
8        8
*U*U*    *U*U*

@
Scc - Set/clear byte based on cc
if cc true $FF -> dest; else $00 -> dest
<ea>
8
-----

@
STOP - enable/wait interrupt (Priviledged)
if(S=1) d16->SR, PC+4->PC, wait except; ELSE TRAP
#d
16
*****

@
SUB - Subtract binary  src,dest
dest - src -> dest
<ea>,Dn   Dn,<ea>
8,16,32   8,16,32
*****     *****

@
SUBA - Subtract binary from An  src,dest
dest - src -> dest  (all 32 bits of dest affected)
<ea>,An
16,32
-----

@
SUBI - Subtract immediate  #d,dest
dest - #d -> dest
#d,<ea>
8,16,32
*****

@
SUBQ - Subtract 3bit immediate  #d3,dest
dest - #d3 -> dest
#d3,<ea>
8,16,32
*****

@
SUBX - Subtract with extend  src,dest
dest - src - X -> dest
Dy,Dx     -(Ay),-(Ax)
8,16,32   8,16,32
*****     *****

@
SWAP - swap the 2 words in Dn
Dn[31:16] <-> Dn[15:0]
Dn
16
-----

@
TAS - Test and Set (Don't use on Amiga)
Test dest -> CCR; 1 -> dest[bit 7]
<ea>
8
-**00

@
TRAP - generate a trap
PC-> -(SSP); SR-> -(SSP); Vector#d4-> PC
#<vector>
none
-----

@
TRAPV - overflow trap
if V=1 then TRAP
none
none
-----

@
TST - Test for negative or zero
Test dest -> CCR
<ea>
8,16,32
-**00

@
UNLK - Frees stack frame alloc'd by a LINK
An -> SP;  (SP)+ -> An
An
unsized
-----