TABLE OF CONTENTS Chapter 1 INTRODUCTION Components of the Amiga ..................................2 THE MC68000 AND THE AMIGA CUSTOM CHIPS.................2 VCR AND DIRECT CAMERA INTERFACE........................5 PERIPHERALS............................................5 SYSTEM EXPANDABILITY AND ADAPTABILITY..................6 About the Examples........................................7 Some Caveats to Hardware Level Programmers ...............9 Chapter 2 COPROCESSOR HARDWARE ............................13 Introduction.............................................13 ABOUT THIS CHAPTER....................................14 What is a Copper Instruction? ...........................14 The MOVE Instruction ....................................15 The WAIT Instruction.....................................17 HORIZONTAL BEAM POSITION..............................18 VERTICAL BEAM POSITION ...............................18 THE COMPARISON ENABLE BITS............................19 Using the Copper Registers...............................20 LOCATION REGISTERS ...................................20 JUMP STROBE ADDRESS...................................21 CONTROL REGISTER......................................21 Putting Together a Copper Instruction List ..............22 COMPLETE SAMPLE COPPER LIST...........................24 LOOPS AND BRANCHES ...................................25 Starting and Stopping the Copper ........................25 STARTING THE COPPER AFTER RESET.......................25 STOPPING THE COPPER...................................26 Advanced Topics.........................................27 THE SKIP INSTRUCTION..................................27 COPPER LOOPS AND BRANCHES AND COMPARISON ENABLE.......28 USING THE COPPER IN INTERLACED MODE ..................30 USING THE COPPER WITH THE BLITTER.....................31 THE COPPER AND THE 68000..............................31 - vii - Summary of Copper Instructions .......................32 Chapter 3 PLAYIELD HARDWARE................................33 Introduction.............................................33 ABOUT THIS CHAPTER....................................34 PLAYFIELD FEATURES ...................................34 Forming a Basic Playfield ...............................38 HEIGHT AND WIDTH OF THE PLAYFIELD.....................39 BIT-PLANES AND COLOR .................................39 SELECTING HORIZONTAL AND VERTICAL RESOLUTION .........43 ALLOCATING MEMORY FOR BIT-PLANES .....................46 CODING THE BIT-PLANES FOR CORRECT COLORING ...........49 DEFINING THE SIZE OF THE DISPLAY WINDOW ..............50 TELLING THE SYSTEM HOW TO FETCH AND DISPLAY DATA .....53 DISPLAYING AND REDISPLAYING THE PLAYFIELD ............56 ENABLING THE COLOR DISPLAY ...........................56 BASIC PLAYFIELD SUMMARY ..............................57 EXAMPLES OF FORMING BASIC PLAYFIELDS .................59 Forming a Dual-playfield Display ........................62 Bit-Plane Assignment in Dual-playfield Mode .............62 COLOR REGISTERS IN DUAL-PLAYFIELD MODE ...............65 DUAL-PLAYFIELD PRIORITY AND CONTROL ..................66 ACTIVATING DUAL-PLAYFIELD MODE .......................67 DUAL PLAYFIELD SUMMARY ...............................67 Bit-planes and Display Windows of All Sizes .............68 WHEN THE BIG PICTURE IS LARGER THAN THE DISPLAY WINDOW .68 MAXIMUM DISPLAY WINDOW SIZE...........................74 Moving (Scrolling) Playfields ...........................75 VERTICAL SCROLLING....................................75 HORIZONTAL SCROLLING .................................77 SCROLLED PLAYFIELD SUMMARY ...........................80 Advanced Topics..........................................81 INTERACTIONS AMONG PLAYFIELDS AND OTHER OBJECTS ......81 HOLD-AND-MODIFY MODE .................................81 FORMING A DISPLAY WITH SEVERAL DIFFERENT PLAYFELD ....84 USING AN EXTERNAL VIDEO SOURCE .......................84 SUMMARY OF PLAYFIELD REGISTERS .......................84 Surnmary of Color Selection .............................87 COLOR REGISTER CONTENTS ..............................87 SOME SAMPLE COLOR REGISTER CONTENTS ..................88 COLOR SELECTION IN LOW-RESOLUTION MODE ...............88 COLOR SELECTION IN HOLD-AND-MODIFY MODE ..............90 COLOR SELECTION IN HIGH-RESOLUTION MODE ..............90 Chapter 4 SPRITE HARDWARE .................................93 Intrduction..............................................93 ABOUT THIS CHAPTER....................................94 Forming a Sprite ........................................94 - viii - SCREEN POSITION ......................................94 SIZE OF SPRITES ......................................97 SHAPE OF SPRITES .....................................97 SPRITE COLOR..........................................98 DESIGNING A SPRITE...................................101 BUILDING THE DATA STRUCTURE..........................101 Displaying a Sprite.....................................106 SELECTING A DMA CHANNEL AND SETTING THE POINTERS.....107 RESETTING THE ADDRESS POINTERS ......................107 SPRITE DISPLAY EXAMPLE...............................108 Moving a Sprite.........................................110 Creating Additional Sprites.............................111 SPRITE PRIORITY......................................112 Reusing Sprite DMA Channels ............................113 Overlapped Sprites......................................115 Attached Sprites .......................................117 Manual Mode ............................................120 Sprite Hardware Details ................................121 Summary of Sprite Registers.............................124 POINTERS.............................................124 CONTROL REGISTERS....................................124 DATA REGISTERS ......................................126 Summary of Sprite Color Registers.......................126 INTERACTIONS AMONG SPRITES AND OTHER OBJECTS ........128 Chapter 5 AUDIO HARDWARE..................................129 Introduction............................................129 INTRODUCING SOUND GENERATION.........................130 THE AMIGA SOUND HARDWARE.............................133 Forming and Playing a Sound ............................134 DECIDING WHICH CHANNEL TO USE........................134 CREATING THE WAVEFORM DATA...........................134 TELLING THE SYSTEM ABOUT THE DATA ...................136 SELECTING THE VOLUME ................................136 SELECTING THE DATA OUTPUT RATE.......................137 PLAYING THE WAVEFORM ................................140 STOPPING THE AUDIO DMA...............................141 SUMMARY..............................................142 EXAMPLE..............................................142 Producing Complex Sounds................................143 JOINING TONES .......................................143 PLAYING MULTIPLE TONES AT THE SAME TIME..............145 MODULATING SOUND ....................................145 Producing High-quality Sound............................148 MAKING WAVEFORM TRANSITIONS .........................148 SAMPLING RATE .......................................148 EFFICIENCY...........................................149 NOISE REDUCTION......................................150 - ix - ALIASING DISTORTION .................................150 LOW-PASS FILTER .....................................152 Using Direct (Non-DMA) Audio Output ....................153 The Equal-tempered Musical Scale........................154 Decibel Values for Volume Ranges .......................159 The Audio State Machine.................................160 Chapter 6 BLITTER HARDWARE................................163 Introduction............................................163 Memory Layout ..........................................164 DMA Channels............................................164 Function Generator......................................168 DESIGNING THE LF CONTROL BYTE WITH MINTERMS..........169 DESIGNING THE LF CONTROL BYTE WITH VENN DIAGRAMS.....172 Shifts and Masks........................................173 Descending Mode ........................................176 Copying Arbitrary Regions...............................177 Area Fill Mode..........................................178 Blitter Done Flag.......................................180 MULTITASKING AND THE BLITTER ........................181 Interrupt Flag .........................................181 Zero Flag...............................................182 Pipeline Register.......................................182 Line Mode...............................................184 REGISTER SUMMARY FOR LINE MODE.......................186 Blitter Speed ..........................................188 Blitter Operations and System DMA ......................189 Blitter Block Diagram...................................193 Blitter Key Points......................................195 EXAMPLE: ClearMem....................................195 EXAMPLE: SimpleLine..................................197 EXAMPLE: RotateBits..................................199 Chapter 7 SYSTEM CONTROL HARDWARE ........................201 Introduction............................................201 Video Priorities .......................................202 FIXED SPRITE PRIORITES ..............................202 HOW SPRITES ARE GROUPED..............................203 UNDERSTANDING VIDEO PRIORITIES ......................203 SETTING THE PRIORITY CONTROL REGISTER................204 Collision Detection ....................................207 HOW COLLISIONS ARE DETERMINED........................207 HOW TO INTERPRET THE COLLISION DATA .................208 HOW COLLISION DETECTION IS CONTROLLED ...............209 Beam Position Detection.................................210 USING THE BEAM POSITION COUNTER......................210 Interrupts .............................................211 NONMASKABLE INTERRUPT ...............................212 - x - MASKABLE INTERRUPTS..................................212 USER INTERFACE TO THE INTERRUPT SYSTEM ..............212 INTERRUPT CONTROL REGISTERS .........................212 SETTING AND CLEARING BITS............................213 DMA Control ............................................217 Processor Access to Chip Memory.........................217 Reset and Early Startup Operation.......................219 Chapter 8 INTERFACE HARDWARE..............................221 Introduction............................................221 Controller Port Interface...............................222 REGISTERS USED WITH THE CONTROLLER PORT..............223 Floppy Disk Controller .....,.............................235 REGISTERS USED BY THE DISK SUBSYSTEM ................236 DISK INTERRUPTS .....................................244 The Keyboard............................................245 HOW THE KEYBOARD DATA IS RECEIVED....................245 TYPE OF DATA RECEIVED................................245 LIMITATIONS OF THE KEYBOARD .........................247 Parallel Input/Output Interface.........................250 Serial Interface .......................................250 INTRODUCTION TO SERIAL CIRCUITRY ....................250 SETTING THE BAUD RATE................................250 SETTING THE RECEIVE MODE ............................251 CONTENTS OF THE RECEIVE DATA REGISTER................251 HOW OUTPUT DATA IS TRANSMITTED.......................253 SPECIFYING THE REGISTER CONTENTS ....................254 Display Output Connections .............................255 Appendix A Register Summary-Alphabetical Order............257 Appendix B Register Summary-Address Order.................281 Appendix C Custom Chip Pin Allocation List................289 Appendix D System Memory Map..............................293 Appendix E Interfaces ....................................295 Appendix F Complex Interface Adapters.....................317 8520 Complex Interface Adaptor (CIA) Chips..............317 Chip Register Map.......................................319 Register Functional Description.........................320 I/O PORTS (PRA, PRB, DDRA, DDRB).....................320 HANDSHAKING..........................................320 INTERVAL TIMERS (TIMER A, TIMER B)...................320 INPUT MODES..........................................322 BIT NAMES on READ-Register...........................322 - xi - BIT NAMES on WRITE-Register .........................322 Time of Day Clock.......................................323 BIT NAMES for WRITE TIME/ALARM or READ TIME..........323 Senal Shift Register (SDR)..............................324 INPUT MODE ..........................................324 OUTPUT MODE .........................................324 BIDIRECTIONAL FEATURE ...............................325 Interrupt Control Register (ICR) .......................325 READ INTERRUPT CONTROL REGISTER .....................326 WRITE INTERRUPT CONTROL MASK ........................326 Control Registers ......................................327 CONTROL REGISTER A ..................................327 BIT MAP OF REGISTER CRA .............................328 BIT MAP OF REGISTER CRB .............................329 Port Signal Assignments.................................329 Hardware Connection Details.............................332 INTERFACE SIGNALS ...................................332 Appendix G AUTOCONFIG ....................................335 Debugging AUTOCONFIG Boards.............................336 Address Specification Table.............................337 Appendix H Keyboard.......................................343 Keyboard Communications.................................344 Keycodes................................................345 "CAPS LOCK" Key.........................................345 "Out-of-Sync" Condition.................................346 Power-Up Sequence ......................................346 Reset Warning...........................................348 Hard Reset..............................................348 Special Codes...........................................349 Matrix Table............................................350 Appendix I External Disk Connector Interface Spec. .......353 General.................................................353 Summary Table...........................................354 Signals When Driving a Disk.............................355 Device I.D..............................................357 Appendix J Hardware Example Include File..................359 Glossary .................................................365 Index ....................................................373 - xii - LIST OF FIGURES Figure 1-1 Block Diagram for the Amiga Computer Family.....11 Figure 2-1 Interlaced Bit-Plane in RAM.....................30 Figure 3-1 How the Video Display Picture Is Produced.......34 Figure 3-2 What Is a Pixel?................................35 Figure 3-3 How Bit-planes Select a Color...................37 Figure 3-4 Significance of Bit-Plane Data in Selecting Colors.38 Figure 3-5 Interlacing.....................................44 Figure 3-6 Effect of Interlaced Mode on Edges of Objects...44 Figure 3-7 Memory Organization for a Basic Bit-Plane.......48 Figure 3-8 Combining Bit-planes............................50 Figure 3-9 Positioning the On-screen Display...............51 Figure 3-10 Data Fetched for the First Line When Modulo=0 .54 Figure 3-11 Data Fetched for the Second Line When Modulo=0.55 Figure 3-12 A Dual-playfield Display.......................63 Figure 3-13 How Bit-Planes Are Assigned to Dual Playfields.64 Figure 3-14 Memory Picture Largerthan the Display..........69 Figure 3-15 Data Fetch for the First Line When Modulo=40...69 Figure 3-16 Data Fetch for the Second Line When Modulo=40..70 Figure 3-17 Data Layout for First Line-Right Half of Big Picture.70 Figure 3-18 Data Layout for Second Line-Right Half of Big Picture.70 Figure 3-19 Display Window Horizontal Starting Position ...72 Figure 3-20 Display Window Vertical Starting Positition ...72 Figure 3-21 Display Window Horizontal Stopping Position ..73 Figure 3-22 Display Window Vertical Stopping Position .....74 Figure 3-23 Vertical Scrolling.............................76 Figure 3-24 Horizontal Scrolling ..........................78 Figure 3-25 Memory Picture Larger than the Display Window .79 Figure 3-26 Data for Line 1 - Horizontal Scrolling ........79 Figure 3-27 Data for Line 2 - Horizontal Scrolling ........79 Figure 4-1 Defining Sprite On-screen Position..............95 Figure 4-2 Position of Sprites ............................96 Figure 4-3 Shape of Spaceship..............................97 Figure 4-4 Sprite with Spaceship Shape Defined ............98 Figure 4-5 Sprite Color Definition ........................99 Figure 4-6 Color Register Assignments ....................100 - xiii - Figure 4-7 Data Structure Layout .........................103 Figure 4-8 Sprite Priority ...............................112 Figure 4-9 Typical Example of Sprite Reuse ...............113 Figure 4-10 Typical Data Structure for Sprite Re-use .....114 Figure 4-11 Overlapping Sprites (Not Attached) ...........116 Figure 4-12 Placing Sprites Next to Each Other ...........117 Figure 4-13 Sprite Control Circuitry .....................122 Figure 5-1 Sine Waveform .................................131 Figure 5-2 Digitized Amplitude Values ....................133 Figure 5-3 Example Sine Wave .............................139 Figure 5-4 Waveform with Multiple Cycles .................149 Figure 5-5 Fuency Domain Plot of Low-Pass Filter .........151 Figure 5-6 Noise-free Output (No Aliasing Distortion) ....151 Figure 5-7 Some Aliasing Distortion ......................152 Figure 5-8 Audio State Diagram ...........................162 Figure 6-1 How Images are Stored in Memory ...............165 Figure 6-2 BLTxP and BLTxMOD calculations ................167 Figure 6-3 Blitter Minterm Venn Diagram ..................172 Figure 6-4 Extracting a Range of Columns .................175 Figure 6-5 Use of the FCI Bit - Bit Is a 0 ...............179 Figure 6-6 Use of the FCI Bit - Bit Is a 1 ...............179 Figure 6-7 Single-Point Vertex Example ...................180 Figure 6-8 Octants for Line Drawing ......................184 Figure 6-9 DMA Time Slot A ocation .......................190 Figure 6-10 Norma 68000 Cycle ............................191 Figure 6-11 Time Slots Used by a Six Bit Plane Display ...192 Figure 6-12 Time Slots Used by a High Resolution Display .192 Figure 6-13 Blitter Block Diagram ........................194 Figure 7-1 Inter-Sprite Fixed Priorities .................202 Figure 7-2 Analogy for Video Priority ....................203 Figure 7-3 Sprite playfield Priority .....................206 Figure 7 4 Interrupt Priorities ..........................216 Figure 8-1 Controler Plug and Computer Connector .........222 Figure 8-2 Mouse Quadrature ..............................224 Figure 8-3 Joystick to Counter Connections ...............227 Figure 8-4 Typical Paddle Wiring Diagram .................229 Figure 8-5 Effects of Resistance on Charging Rate ........230 Figure 8-6 Potentiometer Charging Circuit ................231 Figure 8-7 Chinon Timing Diagram .........................236 Figure 8-8 Chinon Timing Diagram (cont.) .................237 Figure 8-9 The A1000 Keyboard, Showing Keycodes in Hex ...249 Figure 8-10 The A500/2000 Keyboard, Keycodes in Hex ......249 Figure 8-11 Starting Appearance of SERDAT and Shift Reg ..254 Figure 8-12 Ending Appearance of Shift Register...........254 Figure G-1 How to read the Address Specification Table ...338 - xiv - LIST OF TABLES Table 2-1 Interrupting the 68000...........................31 Table 2-2 Copper Instruction Summary ......................32 Table 3-1 Colors in a Single Playfield.....................39 Table 3-2 Porion of the Color Table .......................40 Table 3-3 Contents of the Color Registers .................41 Table 3-4 Sample Color Register Contents ..................41 Table 3-5 Setting the Number of Bit-Planes.................42 Table 3-6 Lines in a Normal Playfield......................43 Table 3-7 Playfield Memory Requirements, NTSC..............46 Table 3-8 Playfield Memory Requirements, PAL ..............47 Table 3-9 DIWSTRT AND DIWSTOP Summary......................53 Table 3-10 Playfield 1 Color Registers-Low-resolution Mode 65 Table 3-11 Playfield 2 Color Registers-Low-resolution Mode 65 Table 3-12 Playfields 1 & 2 Color Registers High-res Mode .66 Table 3-13 Maximum Allowable Vertical Screen Video.........74 Table 3-14 Maximum Allowable Horizontal Screen Video ......75 Table 3-15 Color Register Contents.........................87 Table 3-16 Some Register Values and Resulting Colors.......88 Table 3-17 Low-resolution Color Selection .................89 Table 3-18 Color Selection in Hold-and-modify Mode.........90 Table 3-19 High-resolution Color Selection.................91 Table 4-1 Sprite Data Structure...........................102 Table 4-2 Sprite Color Registers .........................105 Table 4-3 Color Registers for Sprite Pairs................112 Table 4-4 Data Words for First Line of Spaceship Sprite...118 Table 4-5 Color Registers in Attached Sprites ............119 Table 4-6 Color Registers for Single Sprites..............127 Table 4-7 Color Registers for Attached Sprites............128 Table 5-1 Sample Audio Data Set for Channel 0 ............135 Table 5-2 Volume Values ..................................137 Table 5-3 DMA and Audio Channel Enable Bits...............141 Table 5-4 Data Interpretation in Attach Mode..............146 Table 5-5 Channel Attachment for Modulation...............147 Table 5-6 Sampling Rate and Frequency Relationship........153 Table 5-7 Equal-tempered Octave for a 16 Byte Sample......154 - xv - Table 5-8 Five Octave Even-tempered Scale..................15 Table 5-9 Decibel Values and Volume Ranges.................15 Table 6-1 Table of Common Minterm Values...................17 Table 6-2 Typical Blitter Cycle Sequence...................18 Table 6-3 BLTCON1 Code Bits for Octant Line Drawing........18 Table 7-1 Bits in BPLCON2..................................20 Table 7-2 Priority of Playfields Based on Values of Bits PF1P2-PF1P0.20 Table 7-3 CLXDAT Bits......................................20 Table 7-4 CLXCON Bits .....................................20 Table 7-5 Contents of the Beam Position Counter............21 Table 7-6 Contents of DMA Register.........................21 Table 8-1 Typical Controller Connections ..................22 Table 8-2 Determining the Direction of the Mouse...........22 Table 8-3 Interpreting Data from JOY0DAT and JOY1DAT.......22 Table 8-4 POTGO ($DFF034) and POTINP ($DFF016) Registers...23 Table 8-5 Disk Subsystem ..................................23 Table 8-6 DSKLEN Register ($DFF024)........................24 Table 8-7 DSKBYTR Register.................................24 Table 8-8 ADKCON and ADKCONR Regster.......................24 Table 8-9 SERDATR / ADKCON Regsters........................25 Table G-1 Address Specification Table......................33 - xvi - End.