CYCLADES CORPORATION Cyclom-Y series. HARDWARE.DOC 1-Introduction Cyclom-Y series includes 4, 8 and 16-channel cards. They are based on the Cyrrus Logic CD1400 Communication Processor. The communication between the Host computer and Cyclom-Y card is done through a Dual-Ported RAM style interface and hardware interrupts. This document contains the Cyclom-Y hardware specification necessary to writing Device Drivers for any Operating System. In \HARDWARE directory you will find some source code fragments and header files provided by Cyclades. 2- Cyrrus CD1400 Communication Controller Cyrrus Logic CD1400 is a communication processor with embeeded character processing capabilities. Each CD1400 includes a high performance RISC processor and controls 4 serial channels. It supports serial data rates up to 150 kbps and has 12 bytes FIFO for each transmitter and each receiver, with programmable threshold for receive-FIFO-interrupt generation. The internal microcode provides character processing, automatic special character recognition and generation, automatic software and hardware flow control. All CD1400 internal register are accessible to the host compurter software through a Dual-Ported RAM style interface. One Cirrus CD1400 data sheet is included in this Development Kit. Also, code fragments are provided by Cyclades to make easier the development of device drivers for Cyclom-Y series. 3- Hardware Specifications. Cyclom-Y hardware has been used in thousands different locations, with a broad variety of different machines (from old 286 machines to fast 486-DX2 and Pentium machines). The card is proven to be 100% compatible with the ISA/EISA bus specification and does not impose any access limitation. 3.1 - Dip-switch settings. The host uses Dual Port RAM interface to access directly the CD1400 registers on Cyclom-Y cards. The Dual port window size is 8 kbytes and can be configured at any 8 kbytes window bellow 1 Mbyte (segments a, b, c, d, e). The card can interrupt the host at IRQ5, IRQ 9, IRQ10, IRQ11, IRQ12 and IRQ15 interrupt request levels. The address and IRQ configuration is done through only one dip-switch set. +---------------------------------------+ OFF | == == == | == == == == == | ON | == == == | == | +---------------------------------------+ | 1 2 3 4 5 6 7 8 9 10 11 12 | +---------------------------------------+ ======================================================= Dip-switches 7 to 12 configures the interrupt request level. Just one of them should be set to 'ON'. The IRQ-switch correspondence looks like: +--------+-----------+ | switch | IRQ level | +--------+-----------+ | 7 | IRQ 15 | | 8 | IRQ 5 | | 9 | IRQ 9 | | 10 | IRQ 10 | | 11 | IRQ 11 | | 12 | IRQ 12 | +--------+-----------+ Dip-switches 1 to 6 configures the Dual-port RAM window start address : A20 A19 A18 A17 A16 A15 A14 A13 "0" "1" sw6 sw5 sw4 sw3 sw2 sw1 ON = "0" , OFF = "1". Example : The dip-switch settings showed in the figure above corresponds to : IRQ 10 , address 0xd4000. For more details, refer to the Cyclom-Y User's manual. 3.2 - DP-RAM window and addressing. A20-A13 - Select the 8 kbytes DP-RAM window (Dip-switches). A12-A10 - Select the CD1400's or special address: A12 A11 A10 0 0 0 Access 1st CD1400 (Cyclom-4Y, 8Ys and 16Y) 0 0 1 Access 2nd CD1400 (Cyclom-8Ys and 16Y only) 0 1 0 Access 3rd CD1400 (Cyclom-16Y only) 0 1 1 Access 4th CD1400 (Cyclom-16Y only) 1 1 X Clear Interrupt (Cyclom-4Y, 8Ys and 16Y) 1 0 0 Interrupt Status (Cyclom-16Y only) 1 0 1 Hardware reset 16 (Cyclom-16Y only) Note: Cyclom-16Y card is not reset by the ISA bus "reset" signal. Access the "Hardware reset 16 port" to reset the card and then access "Clear Interrupt port' to release the reset before acessing the card at initialization time. A09-A08 - Performs SVCACK cycles for the specific CD1400. (Only for Cyclom-4Y and Cyclom-8Y). Before treating a CD1400 interrupt, it is necessary to perform a SVCACK (Service Acknolowdge) read cycle to perform the 'context switching'. (See item 3.2 and CD1400 Data Sheet): A09 A08 0 0 Internal registers access (specified by A07-A01). 0 1 SVCACKR (reception interrupt acknolowdge). 1 0 SVCACKT (transmission interrupt acknolowdge). 1 1 SVCACKM (modem interrupt acknolowdge). Note: Cyclom-16Y hardware design doesn't support SVCACK access. So we recommend do not use this CD1400 feature if you want the software compatible with all cards. You can do the 'context switch' writing to CAR register (all examples in the Development Kit do this). A07-A01 - Access Cyrrus CD1400 internal registers The card ignores the A0 address line. So access CD1400 registers using only even addresses (see example below). If a 16-bit access is done, only the less significant byte is valid. A00 - Don't care. Access Cyclom-Y only at even addresses. Example: Suppose you have a Cyclom-Y card configured at 0x0d4000 window address. 0xd4000 : Access the first register of the first CD1400. 0xd4001 : Invalid access (odd address). 0xd4002 : Access the second register of the first CD1400. 0xd4004 : Access the third register of the first CD1400. 0xd4200 : SVCACKT for the first CD1400 (except Cyclom-16Y). 0xd4400 : Access the first register of the second CD1400. 0xd4800 : Access the first register of the third CD1400. 0xd5800 : "Clear Interrupt Port". 0xd5000 : Read the "Status Interrupt Port". 0xd5400 : Reset Cyclom-16Y card. A12 A11 A10 0 0 0 Access 1st CD1400 (Cyclom-4Y, 8Ys and 16Y) 0 0 1 Access 2nd CD1400 (only Cyclom-8Ys and 16Y) 0 1 0 Access 3rd CD1400 (only Cyclom-16Y) 0 1 1 Access 4th CD1400 (only Cyclom-16Y) 1 0 X Status interrupt (only Cyclom-16Y) 1 1 X Clear Interrupt (Cyclom-4Y, 8Ys and 16Y) 3.3 - Interrupts. Cyclom-Y can interrupt at IRQ 5, 9, 10, 11, 12, 15 (see item 3.1) interrupt request levels. The hardware interrupt logic is the following (simplified): +------\ SVCREQR ------- \ \ INT CD0 +-------\ SVCREQT -------- ) OR )--------------\ \ SVCREQM ------- / / +----------- \ \ IRQn +------/ | +--------- ) OR )------- | | +------- / / INT CD1 --+ | | / / (...) | | +-------/ INT CD2 ----+ | | INT CD3 ------+ So, after an interrupt, the software must poll the CD1400 controllers to get to know which one(s) generated the interrupt (reading the SVRR register). In Cyclom-16Y, there is a "Interrupt Status Port" that can help in identifying the CD1400 that requested the interrupt. Reading it, you will get: D7-D2 D1 D0 X 0 X CD1400 #0 or #1 interrupt pending. X X 0 CD1400 #2 or #3 interrupt pending. Note: If you intend your software compatible to any Cyclom-Y card, do not use the "Interrupt Status Port". After treating any card interrupt and before sending the EOI to the 8259 interrupt controller, you have to access the "Clear interrupt port" to reset the interrupt generation circuit. Cyclom-Y cards asserts the INT pin high when there is at least one CD1400 requesting an interrupt. Accessing the "Clear interrupt port" cause the INT pin to go down for at least one CPU cycle (if still there are pending interrupts, the INT pin will go high again, generating another interrupt). For more details about treating Cyclom-8Y interrupts, refer to Cyclades code fragments and CD1400 Data Sheet examples. 3.4 - Oscillator frequency. Cyclom-Y cards use a 25 MHz Crystal. (For baud rate generation table, see cyys.c file or CD1400 data sheet). 3.5 - RS-232 control signals. Cyclom-4Y and Cyclom-8Y use RJ12 (6 pins) connectors assembled directly on the PCB. The available control signals are: TxD, RxD, DTR, CTS, GND, DCD. Notice that RTS signal is not available. Some old half-duplex modems may not work without this signal. Cyclom-16Y supports both RJ-45 and DB-25 connectors. TxD, RxD, DTR, CTS, RTS, GND and DCD signals available. Refer to the Cyclom-Y User's Guide for the pinouts. 4 - Source Code fragments The source code of the library of the routines provided in \LIBRARY is a good reference for programmers who are accessing directly the card. The lib_y.c file contains interrupt driver and open/close/read/write routines. The CD1400 data sheet contains some examples and code fragments in C language. Also, Cyclades provides code fragments from the UNIX device driver to help the software developer: - cyys.c : code fragments from Cyclades UNIX dev. driver. - cyys.h : header file for cyys.c. - cd1400.h : All CD1400 registers offset definition. 5 - Device Driver development tips. - Before testing your software, test the card using the TY program provided in this kit to make sure that the hardware is working and that there is no hardware conflict. - The library source code provided as a reference is not the fastest or most efficient but it works. We suggest you to start from there. - The compilers are getting smarter and smarter. When the code is interfacing hardware, though, some kinds of optimization may not work. For example, in specific contexts, some compilers turn 'byte' accesses in 'word' accesses to get a more efficient code. But when you are reading a 8-bit register, you need a 'byte' access. We suggest you to disable all kind of optimizations during the development and debug steps.