/* write access to registers 40/42 */
/* register 42: */
#define HCBP		128
#define MRESET		64
#define SEL_ST506	0
#define SEL_SCSI	32
#define INT_ENABLE	16

/* read access to registers 40/42 */
/* register 40: */
#define INT_FOLLOW	128
#define INT2_PENDING	16
/* register 42: */
#define CCBP		128

#define A2090_CNTL_LO	0x40
#define A2090_CNTL_HI	0x42
#ifdef A2090
#define SCSI_CS_CNTL	0x60
#define SCSI_CS_DATA	0x62
#endif
#ifdef A2091
#define SCSI_CS_CNTL	0x91
#define SCSI_CS_DATA	0x93
#endif
#ifdef A3000
#define SCSI_CS_CNTL	0x41
#define SCSI_CS_DATA	0x43
#endif
#ifdef A2090
/* not used but on the 2090 */
#define SCSI_PCSS	0x64
#define SCSI_PCSD	0x68
#endif

#ifdef A2090
/* the maximum memory block the 2090 DMA circuit can fill with one
 * operation.
 */
#define DMA_MAX_TRANSFER 64*1024
#endif
#ifdef A2091
/* seems there is no such limit... GREAT! */
#define DMA_MAX_TRANSFER (ulong)~0
#endif


#ifdef A2090
/* DMA states */
#define DMA_LD_UP_ADDR	0xfb
#define DMA_LD_MID_ADDR	0xfd
#define DMA_LD_LO_ADDR	0xf6	/* loads low latch and starts dma */
#define DMA_OPEN_FIFO	0xf7
#define DMA_READ_STATUS	0xef
#define DMA_RESET_1	0x7f
#define DMA_RESET_2	0xff
#endif

/* wd register names */
#define WD_OWN_ID		0x00
#define WD_CONTROL		0x01
#define WD_TIMEOUT_PERIOD	0x02
#define WD_CDB_1		0x03
#define WD_CDB_2		0x04
#define WD_CDB_3		0x05
#define WD_CDB_4		0x06
#define WD_CDB_5		0x07
#define WD_CDB_6		0x08
#define WD_CDB_7		0x09
#define WD_CDB_8		0x0a
#define WD_CDB_9		0x0b
#define WD_CDB_10		0x0c
#define WD_CDB_11		0x0d
#define WD_CDB_12		0x0e
#define WD_TARGET_LUN		0x0f
#define WD_COMMAND_PHASE	0x10
#define WD_SYNCHRONOUS_TRANSFER	0x11
#define WD_TRANSFER_COUNT_MSB	0x12
#define WD_TRANSFER_COUNT	0x13
#define WD_TRANSFER_COUNT_LSB	0x14
#define WD_DESTINATION_ID	0x15
#define WD_SOURCE_ID		0x16
#define WD_SCSI_STATUS		0x17
#define WD_COMMAND		0x18
#define WD_DATA			0x19
#define WD_AUXILIARY_STATUS	0x1f

/* wd commands */
#define WD_CMD_RESET		0x00
#define WD_CMD_ABORT		0x01
#define WD_CMD_ASSERT_ATN	0x02
#define WD_CMD_NEGATE_ACK	0x03
#define WD_CMD_DISCONNECT	0x04
#define WD_CMD_RESELECT		0x05
#define WD_CMD_SELECT_WITH_ATN			0x06
#define WD_CMD_SELECT_WITHOUT_ATN		0x07
#define WD_CMD_SELECT_WITH_ATN_AND_TRANSFER	0x08
#define WD_CMD_SELECT_WITHOUT_ATN_AND_TRANSFER	0x09
#define WD_CMD_RESELECT_AND_RECEIVE_DATA	0x0a
#define WD_CMD_RESELECT_AND_SEND_DATA		0x0b
#define WD_CMD_WAIT_FOR_SELECT_AND_RECEIVE	0x0c
#define WD_CMD_TRANSLATE_ADDRESS	0x18
#define WD_CMD_TRANSFER_INFO		0x20
#define WD_CMD_TRANSFER_PAD		0x21
#define WD_CMD_SBT_MODE			0x80

/* values for "direction" */
#define DIRECTION_READ	1
#define DIRECTION_WRITE	0

typedef unsigned char ubyte;
typedef unsigned short ushort;
typedef unsigned long ulong;

#include <devices/scsidisk.h>

struct scsi_msg {
  struct Message scm_message;
  ubyte  scm_unit;
	/*
	 * scm_cmd (in): either SCM_CMD_EXEC_SCSI (execute this message's
	 *		 scm_scsi_cmd on unit scm_unit).
	 * 		 or SCM_CMD_SHUTDOWN (shutdown handler task).
	 * scm_cmd (out):io_Error to be returned, if SCM_CMD_EXEC_SCSI
	 */
  ubyte  scm_cmd;
  struct SCSICmd *scm_scsi_cmd;
};

#define SCM_CMD_EXEC_SCSI 1
#define SCM_CMD_SHUTDOWN  2