|
|
[Attention: If you dare execute the actions specified hereafter, you do it at your own risk!]
THIS currently is ONLY a purely theoretical consideration. That means, something like this should/could work as a modification. It does not mean, that it it really will operate!
Everybody is urgently dissuaded from making any changes to a CSPPC board prompted by this article!
Should anybody be brave (stupid) enough to try it anyway, I'll deny any knowledge or responsibility for it!
Man, how ssllowww is "Quake" today! Now I have a 604 and nonetheless the game is lame. So let's have a look at what can be done about it. Quickly scan the page about overclocking, everything is calculated and you jump to the conclusion: Overclocking is not the solution.
For instance, clocking a 150 MHz PPC to 170 MHz? Just a 10% improvement, instead of 20 FPS you could get 22 FPS ... how great! You might not even notice this! So, some other processor must be installed on the board. Quickly to the www.mot.com site and ... oh yeah, there is the 604e with 350 MHz! This sounds like a good speed.
First thing is downloading the PDF documents and investigating if this silicon is pin-compatible. And yes, it is ... but what do I read? "NOT 5 VOLT TOLERANT" ... OH OHHH! Quickly you discover that all PPC processors faster than 233 MHz only can stand a max. level of 3.45 volts. If such a processor is fed more than this, you can just throw it away. Quite frustrated, I have a look at the other PPC processors. And I recognize that the processors are not only software, but mostly as well hardware, compatible (Beside the 740s). Quickly I check the pin arrangements and lo, they are (nearly) identical!
Well, but how do I install such a processor onto my CSPPC board? Firstly I will need a level adapter. For both inputs and outputs a circuit built of older components is rapidly sketched up. But the signal propagation times are extremely long and the number of components exceeds 500. Not acceptable!
And a further problem arises: These newer processors starting with the G3 need a so-called "Level-2 Cache". But after several investigations I found a solution ... or better I cribbed it! For some time the PowerMac has used so-called ZIF sockets, into which a board is inserted. Upon this board the L2 cache and the processor is placed. Additionally the main board is informed via certain connectors which clock rate and voltage the board needs. Just ideal for this project.
And a further item pops up: The power-up startup process is different compared to the 604 processors. During startup it is determined where first the power must be applied, because otherwise the processor gets "roasted". Sounds funny, but is understandable.
With this we have a list of all items needed: A ZIF socket, a fitting processor board, the power supply including powerup and finally of course the signal adapter.
Once at an Amiga gathering a manufacturer displayed a prototype of a G3 Turbo Board for the A1200, which did without a 68k processor. A closer look showed how those people had managed it. On board there was the processor, the L2 cache and a flash memory for the boot process and the 68k emulation - and two more components to prevent the processor from getting "broiled" by the 5 volts from the Amiga. These two ICs are very simple but super-fast level converters, which are ideal for this project as well. Fur ther data for these chips you will find at the end of the next part of this workshop under the topic "Components".
In principle it could be done like this: The 604-processor is soldered off, the signals are led to another board which houses our custom circuitry. This circuitry consists of the power supply, the powerup and the signal converters. And of course there is the ZIF socket, too. All we have to do now is build one.
All right, in theory we have everything that might be needed. But it is not that simple, because the processor on the CSPPC is of the BGA type. That means, that the connectors for the processor are under its body. If we want to remove the processor, we need a BGA soldering machine, otherwise the board will be damaged and we will have to look for another CSPPC. And even if we had such a machine somewhere on hand and were able to remove the processor, we will have an additional problem. The contact pins are tiny! It would be a real challenge to connect those tiny pins to our homemade board. Just pull a little bit too hard and the CSPPC board is done forever. But we are not yet at our wits' end.
Though we have nearly none or even no documents about the CSPPC board and have no possibility of getting any of them, we can try to work out the layout. But unfortunately the CSPPC just has too many layers to make this an easy job. Unless someone gives us a defective CSPPC, which we can disassemble part by part to work out the circuit diagram.... Or someone in a certain company assists us with certain documents (broad hint). :)
A further way to find out more about the signals of the processor is via the expansion port of the CSPPC. Theoretically all important data should be present at this port. If necessary, the connections left over may finally be picked out. Possibly in a way that enables switching between the original PPC CPU and our selfmade board.
The more savvy of you will already have asked: Hey man, the 604 runs with 150 - 233 MHz and this new board does up to 750 MHz, how can the the CSPPC hardware manage this? Well, the PPC bus of the 604 runs up to approximately 75 MHz, while the new G4 processors have a bus running between 33 and 133 MHz. It all depends upon the setting of the clock dividers. For instance, the 604e/150 MHZ runs with a bus speed of 60 MHz and a divider setting of 2.5. The 750 MHz G4 variant could do it like this: 62 MHz bus c lock, divider set to 12, or 75 MHz bus clock, divider at 10. The smaller the setting number of the divider, the higher the memory throughput. And as well more heat develops ... it is advisable to install at 75 MHz an additional blower for the memory chips.
Now I move up the garden-path! For what do we know about the CSPPC at all? How is it made up and how does it work? Honestly, I only can guess, because I do not have any documents (besides the manual). First the 64-bit bus of the 604e must be adapted to the 32-bit bus of the 68k processor. This means we need something with the storage and sufficient input/output ports. If we look at our CSPPC, we recognize lots of 74FTC543 devices (upon request at dw@teleservice.com 74FTC543_DS_30937.pdf). And exactly those components are specified to adapt the bus from 64 bit to 32 bit. In the PDF document (AN1271.pdf) on page 8 you find a little example for the connection, which, though it is realized with a 74F646, nicely shows how this is done.
Example:
32bit ____ 64bit
A0-32 ___ __| |------ A0-32
68k Bus Y | 74 | 60X Bus
\--| 646|------ A33-64
| |
ŻŻŻŻ
Further more you see in the example circuit (PDF document), that for the control of the 74FTC543 devices a Mach210 is used. And one of these babies we find on the CSPPC.
Theoretically the whole bus should be changed over. By this the complete 68k system should come to a halt. To test this I started the system and simply interrupted the clock of the PPC processor. The result was that indeed everything stopped, including the mouse pointer. As soon as the clock was restarted, the system proceeded without fail. If you try the same procedure in the Early-Startup Menu, this does not happen. This indicates that a separate program, which is executed automatically after the comput er starts, controls the Mach210, which after that switches over. I was not able to determine which processor runs this program. But I think that it is running on the 68k processor, because a task with the name "PPC Early-Startup" or similar runs there.
In the 2nd part you will read:
Dirk Wenk <Dirk@wax7.de>