From Prolific@cup.portal.com Sat Mar 20 18:31:25 1993 Received: from nova.unix.portal.com by toadflax.cs.ucdavis.edu (4.1/UCD.CS.2.1) id AA15245; Sat, 20 Mar 93 18:31:23 PST Return-Path: Received: by nova.unix.portal.com (5.65b/4.1 1.238) id AA04288; Sat, 20 Mar 93 18:31:22 -0800 Received: by portal.unix.portal.com (1.497) id AA07295; Sat, 20 Mar 93 18:31:20 -0800 Received: by hobo.corp.portal.com (4.1/4.0.3 %I%) id AA18852; Sat, 20 Mar 93 18:31:20 PST To: announce@cs.ucdavis.edu From: Prolific@cup.portal.com Subject: Pro-Net demo available for FTP (Jeff Lindstrom) Lines: 92 Date: Sat, 20 Mar 93 18:31:19 PST Message-Id: <9303201831.1.18692@cup.portal.com> X-Origin: The Portal System (TM) Status: R [ Jeff is manager of technical support at Prolific. -Dan ] TITLE Demonstration version of a Schematic Capture program for the Amiga. VERSION Pro-Net_Demo V2.0C COMPANY Prolific, Inc. 6905 Oslo Circle, Ste. B3 Buena Park, CA 90621 Phone: (714) 522-5655 FAX: (714) 994-6435 InterNet: Prolific@cup.portal.com DESCRIPTION This packages is a demonstration version of Pro-Net V2.0C, a Schematic Capture program which allows you to create a circuit quickly and easily. Several sample Library Device are provided which allow for experimentation and a basis for easy modification of existing devices to new logic families. This demo is fully functional except that it cannot save schematic pages. The following description describes the commercial release of the software. Several of the features described here require the ability to save pages in order to work. Pro-Net supports multiple page schematics with Page Referencing (industry first), and Net List connections can be made directly on one page or indirectly on any number of pages by means of Signal Names applied to the Signal Lines. Device Labels are tracked and automatically inserted when the device is called out. Multiple device gates per package are directly supported (i.e. 7400 Quad NAND). Device and Pin Swapping is supported with error checking. Device Labels can be assigned by Zones so that logical gates will not share a physical device with gates in another area (industry first). Device Labels, Device Numbers, and Pin Numbers may also be hidden, if desired. Signal Lines can be bundled together for cleaner schematics and Bundles can be named for more readable schematics. The hierarchical command structure groups commands by mode and is implemented by context-sensitive Intelligent Function Keys (IFKs). Powerful commands augment schematic creation: Demorgan equivalence, Rubberbanding, Grid Snap, Grid Display, Grid Size control, Bus Bundling, Signal Name stepping, Move, Repeat, Copy, etc. New devices can be quickly and easily drawn and described. Variable template sizes support MIL-STD 860. Page size ranges from A to E. HOST NAME Anonymous FTP Available on amiga.physik.unizh.ch (130.60.80.80) Commercial Also available on Portal DIRECTORY amiga.physik.unizh.ch (130.60.80.80) : pub/aminet/biz/demo Portal: GO 23365.3.2.2 FILE NAMES PNDEMO20C.lha DISTRIBUTABILITY Copyright by Prolific, Inc. This demonstration version may be freely distributed.