Genlock circuit operation description ----------------------------------------------------------- Enhancements: One feature that space does not allow for now is the ability to have software control of pixel switch disable. Now this is done with a mechanical switch. Pixel switch disable allows the user to completely ignore background video, yet have the Amiga computer genlocked. This eliminates the problem of software having to be written with genlock in mind. It would add $5-$10 to cost of goods. The control bits would be encoded in the vertical interval, as audio on/off is presently done. Eight to sixteen functions (bits) could be controlled once this ability is on the board. CHROMA KEY -- since all signals are in RGB format, it would be easy to selectively insert video based on color level. Additional circuitry would add about $10, but would not fit in the existing case. ============================================================ Circuit description The purpose of the genlock peripheral is to synchronize the video output of the Amiga computer with another video source such as camera, broadcast, or VCR. Circuitry inside the peripheral allows for the overlay of computer graphics on whatever video source is connected. Also provided are facilities for stereo mixing of computer and source audio. Input to the genlock peripheral is composite source and analog RGB computer video. Output video is in the forms of composite and analog RGB for high-resolution viewing on an RGB monitor. Also output are a master 28.636363 MHZ computer clock, H/2, and V/2 video resets required to synchronize the computer's graphic devices. Power for this device is derived from computer +5, +12, -5 volts D.C. rails. Circuitry in the peripheral is divided into several main functions which are: 1) regenerating the horizontal and vertical components of the original composite source video, (2) phase locking the 28 MHZ clock to input video horizontal timing, (3) combining source and computer video, (4) mixing source and computer audio, (5) and encoding the RGB overlayed video into NTSC or PAL. (1) REGENERATING HORIZONTAL AND VERTICAL TIMING Source composite video enter on J1. Transistors Q16 and Q7 form a feedback amplifier with a gain of 3. Simple sync tip clamping is provided by CR3, whose clamp voltage is set by CR4. The net effect is to clamp sync tips at around 0 volts. Comparator U3 strips the sync off of the clamóé±€Nuòìðóöøúüþ "$* 2¨cp›-È 2Á DiskChange.}ÿÿÿýóOVéO(jdp N•$"<•Iúÿî(lÿü/ /ÙÌÙÌ g ,倲´l"4(T`ä,2‘È(jtp N•Jgà2**p$AÕÊÕÊ. J Æ(FÙÇÙÌÙÌ