IFND SUPERGEN_SUPERGEN_I SUPERGEN_SUPERGEN_I SET 1 ************************************************************************* ** ** ** supergen.i -- supergen.library declarations ** ** ** ** v3.0 ** ** ** ** 13 Dec 1991 - Bill Barton - slight revisions (v3.0) ** ** 15 Aug 1989 - Bill Barton - revised for SuperGen 2000s (v2.0) ** ** 30 Dec 1987 - John Botteri - created this file ** ** ** ** Copyright (C) 1987-1991 Digital Creations, Inc. ** ** All rights reserved. ** ** ** ************************************************************************* IFND EXEC_TYPES_I include "exec/types.i" ENDC ************************************************************************* ** ** ** Misc. Definitions ** ** ** ************************************************************************* SUPERGEN_Minimum equ 2 ; Minimum supported library version ************************************************************************* ** ** ** Misc. SuperGen() Definitions ** ** ** ************************************************************************* ; Mode values SGM_Software equ 1 SGM_Manual equ 0 ; fader values are in terms of how much external video is shown: ; ; value pos amiga video ; ----- --- ----- ----- ; SGF_Min up max min ; SGF_Max down min max SGF_Min equ 0 ; Min fader value SGF_Max equ 63 ; Max fader value SGF_Up equ SGF_Min SGF_Down equ SGF_Max SGF_Amiga equ SGF_Min ; Fader value for full Amiga graphics SGF_Video equ SGF_Max ; Fader value for full external video ; Time values SGT_NoChange equ -1 ; Value for SuperGen() Time arguments to ; prevent corresponding fader from being ; affected ************************************************************************* ** ** ** SuperGen 2000s Register Definitions ** ** ** ************************************************************************* ; Register Numbers SGR_Dissolve equ 0 ; Dissolve fader values (6/6) SGR_Control equ 1 ; Control Register (12) SGR_CPhase equ 2 ; Chroma Phase Fine/Coarse (8/3) SGR_SatVPhase equ 3 ; Saturation and V-Phase (8/4) SGR_HPhase equ 4 ; Horizontal Phase Adjust (12) SGR_Null equ -1 ; special register number ; Dissolve Register (SGR_Dissolve) ; ; 11 10 9 8 7 6 5 4 3 2 1 0 ; +-----------------+-----------------+ ; | Background | Foreground | ; +-----------------+-----------------+ ; ; This register also exists on the SG-10 and is normally controlled by ; the SuperGen() function. ; ; NOTE: Writing to this register with SGSetRegister() affects the ; behavior of SuperGen(): ; ; . Setting this register while in SGM_Manual mode will set the mode ; to SGM_Software. ; ; . Setting this register during a dissolve effect will load the ; new value into the dissolve register and terminate the ; dissolve effect (sending signals where appropriate). ; ; Calling SGSetRegister() with SGR_Null for the register number will ; revert to SGM_Manual mode. ; ; Reading this register is harmless. In most cases this register will ; contain the last value set by the dissolve ramp generator. However ; if the SuperGen() mode is set to SGM_Manual during a dissolve ; effect, the values returned by StatusGen() may not match the ; contents of this register. SGDIS_FG_Shift equ 0 SGDIS_FG_Bits equ 6 SGDIS_FG_Mask equ $03f SGDIS_BG_Shift equ 6 SGDIS_BG_Bits equ 6 SGDIS_BG_Mask equ $fc0 ; Control Register (SGR_Control) ; ; 11 10 9 8 7 6 5 4 3 2 1 0 ; +-----------------------------------+ ; | Control Bits | ; +-----------------------------------+ ; ; NOTES ; ----- ; 1. The Dissolve Hold bit is automatically managed by calls ; to SuperGen...() to keep it in sync with the software ; dissolve mode. ; ; 2. Some bits are interrelated. ; ; AlphaKey and AutoDissolve: ; ; AK AD Mode ; -- -- ---- ; 0 0 Amiga key, normal dissolve ; 0 1 Amiga key, interpretive dissolve ; 1 0 External Alpha key ; 1 1 Future Expansion (DON'T USE) ; ; BlankSelect and VIPass: ; ; BS VI Mode ; -- -- ---- ; 0 x External blanking ; 1 0 Internal blanking, pass v-lines 10-21 ; 1 1 Internal blanking ; ; See the SuperGen 2000s manual for more detail about how these ; controls behave. SGCR_Mask equ $fff ; use this mask when reading current control bit settings ; bit numbers and masks ; Bit Discription 0 1 ; --------------------- ------- ------- BITDEF SGCR,AGC,0 ; Auto Gain Chroma Off On BITDEF SGCR,IntKey,1 ; Internal Key Enable Disable BITDEF SGCR,DissolveHold,2 ; Dissolve Hold Mode Off On BITDEF SGCR,VIPass,3 ; Vert. Interval Pass On Off BITDEF SGCR,BlankSelect,4 ; Blank Select Ext. Int. BITDEF SGCR,AlphaKey,5 ; Alpha Key Disable Enable BITDEF SGCR,RGBTerm,6 ; RGB Termination Enable Disable BITDEF SGCR,FastClamp,7 ; Fast Sync Tip Clamp Disable Enable BITDEF SGCR,NotchFilter,8 ; Notch Filter Disable Enable BITDEF SGCR,TimingMode,9 ; Timing Mode Disable Enable BITDEF SGCR,AutoDissolve,10 ; Auto (interpretive) ; Dissolve Disable Enable BITDEF SGCR,SetupAdder,11 ; Setup (7.5 IRE) Adder Enable Disable ; control values (based on bit descriptions above) ; note that some of the bits are negative logic! SGCR_AGC_On equ SGCRF_AGC SGCR_AGC_Off equ 0 SGCR_IntKey_On equ 0 SGCR_IntKey_Off equ SGCRF_IntKey SGCR_DissolveHold_On equ SGCRF_DissolveHold SGCR_DissolveHold_Off equ 0 SGCR_VIPass_On equ 0 SGCR_VIPass_Off equ SGCRF_VIPass SGCR_IntBlank equ SGCRF_BlankSelect SGCR_ExtBlank equ 0 SGCR_AlphaKey_On equ SGCRF_AlphaKey SGCR_AlphaKey_Off equ 0 SGCR_RGBTerm_On equ 0 SGCR_RGBTerm_Off equ SGCRF_RGBTerm SGCR_FastClamp_On equ SGCRF_FastClamp SGCR_FastClamp_Off equ 0 SGCR_NotchFilter_On equ SGCRF_NotchFilter SGCR_NotchFilter_Off equ 0 SGCR_TimingMode_On equ SGCRF_TimingMode SGCR_TimingMode_Off equ 0 SGCR_AutoDissolve_On equ SGCRF_AutoDissolve SGCR_AutoDissolve_Off equ 0 SGCR_SetupAdder_On equ 0 SGCR_SetupAdder_Off equ SGCRF_SetupAdder ; Saturation and V-Phase Register (SGR_SatVPhase) ; ; 11 10 9 8 7 6 5 4 3 2 1 0 ; +-----------+-----------------------+ ; | V-Phase | Saturation | ; +-----------+-----------------------+ SGSVP_Sat_Shift equ 0 SGSVP_Sat_Bits equ 8 SGSVP_Sat_Mask equ $0ff SGSVP_VPhase_Shift equ 8 SGSVP_VPhase_Bits equ 4 SGSVP_VPhase_Mask equ $f00 ; Chroma Phase Register (SGR_CPhase) ; ; 11 10 9 8 7 6 5 4 3 2 1 0 ; +--+--------+-----------------------+ ; |SP| Coarse | Fine Tune | ; +--+--------+-----------------------+ ; ; SP is an unused (Spare) Bit. Don't set it. SGCPH_Fine_Shift equ 0 SGCPH_Fine_Bits equ 8 SGCPH_Fine_Mask equ $0ff SGCPH_Coarse_Shift equ 8 SGCPH_Coarse_Bits equ 3 SGCPH_Coarse_Mask equ $700 ; Horizontal Phase Adjust (SGR_HPhase) ; ; 11 10 9 8 7 6 5 4 3 2 1 0 ; +-----------------------------------+ ; | Horizontal Phase | ; +-----------------------------------+ SGHPH_Shift equ 0 SGHPH_Bits equ 12 SGHPH_Mask equ $fff ************************************************************************* ** ** ** SuperGenInfo ** ** ** ** Structure returned by SuperGenType(). ** ** ** ** All fields must be considered READ ONLY and some fields ** ** contain private data. The only fields that you should read ** ** are Model, Flags, RegMask, and Name. ** ** ** ************************************************************************* STRUCTURE GenRegister,0 ; register data UWORD gr_Reg UWORD gr_Mask LABEL GenRegister_Size STRUCTURE SuperGenInfo,0 ULONG sgi_Ident ; SGEN STRUCT sgi_Regs,8*GenRegister_Size ; hardware register shadows (PRIVATE!) UWORD sgi_Model ; Model number (one of SGMODEL_ #'s UBYTE sgi_Flags ; currently 0, for future expansion UBYTE sgi_RegMask ; which registers are supported (SGRF_ bits) STRUCT sgi_Name,32 LABEL SuperGenInfo_Size SGEN equ 'SGEN' SGMODEL_SuperGen equ 10 ; original SuperGen SGMODEL_2000s equ 2000 ; SuperGen 2000s ENDC SUPERGEN_SUPERGEN_I